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authorTony Luck <tony.luck@intel.com>2005-10-28 11:15:08 -0700
committerTony Luck <tony.luck@intel.com>2005-10-28 11:15:08 -0700
commit0d9136fdbcdbddcd4eb5ac94c248c039193d4795 (patch)
tree2e914c8afe019302199b5d807114e5b15835dc90 /include/asm-ia64/sn/tioca_provider.h
parent9189674026e86e624b1ef1b4eb430e9ad19f9641 (diff)
parent1fa92957282e4595727c1a21bf6687ea5a2d612f (diff)
downloadtalos-op-linux-0d9136fdbcdbddcd4eb5ac94c248c039193d4795.tar.gz
talos-op-linux-0d9136fdbcdbddcd4eb5ac94c248c039193d4795.zip
Pull altix-mmr into release branch
Diffstat (limited to 'include/asm-ia64/sn/tioca_provider.h')
-rw-r--r--include/asm-ia64/sn/tioca_provider.h14
1 files changed, 7 insertions, 7 deletions
diff --git a/include/asm-ia64/sn/tioca_provider.h b/include/asm-ia64/sn/tioca_provider.h
index 5ccec608d325..b532ef6148ed 100644
--- a/include/asm-ia64/sn/tioca_provider.h
+++ b/include/asm-ia64/sn/tioca_provider.h
@@ -182,11 +182,11 @@ tioca_tlbflush(struct tioca_kernel *tioca_kernel)
* touch every CL aligned GART entry.
*/
- ca_base->ca_control2 &= ~(CA_GART_MEM_PARAM);
- ca_base->ca_control2 |= CA_GART_FLUSH_TLB;
- ca_base->ca_control2 |=
- (0x2ull << CA_GART_MEM_PARAM_SHFT);
- tmp = ca_base->ca_control2;
+ __sn_clrq_relaxed(&ca_base->ca_control2, CA_GART_MEM_PARAM);
+ __sn_setq_relaxed(&ca_base->ca_control2, CA_GART_FLUSH_TLB);
+ __sn_setq_relaxed(&ca_base->ca_control2,
+ (0x2ull << CA_GART_MEM_PARAM_SHFT));
+ tmp = __sn_readq_relaxed(&ca_base->ca_control2);
}
return;
@@ -196,8 +196,8 @@ tioca_tlbflush(struct tioca_kernel *tioca_kernel)
* Gart in uncached mode ... need an explicit flush.
*/
- ca_base->ca_control2 |= CA_GART_FLUSH_TLB;
- tmp = ca_base->ca_control2;
+ __sn_setq_relaxed(&ca_base->ca_control2, CA_GART_FLUSH_TLB);
+ tmp = __sn_readq_relaxed(&ca_base->ca_control2);
}
extern uint32_t tioca_gart_found;
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