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| author | Bernd Schmidt <bernds_cb1@t-online.de> | 2008-05-07 11:41:26 +0800 |
|---|---|---|
| committer | Bryan Wu <cooloney@kernel.org> | 2008-05-07 11:41:26 +0800 |
| commit | 0893f1250f87e0a832f47bb60fb69ed0d52be7a3 (patch) | |
| tree | 96dbea09cc618f4e6c4db2a671de215ba6b9784b /include/asm-blackfin/mach-common | |
| parent | 8513c42edb3f1c91a8418fae11846c87cf7b8581 (diff) | |
| download | talos-op-linux-0893f1250f87e0a832f47bb60fb69ed0d52be7a3.tar.gz talos-op-linux-0893f1250f87e0a832f47bb60fb69ed0d52be7a3.zip | |
[Blackfin] arch: fix gdb testing regression
When transferring to IRQ5 from an exception, save SYSCFG in memory across the
transfer and clear the trace bit.
When we get a single step exception, check whether we can safely clear the
trace bit in SYSCFG. We can (and should) clear it after the first instruction
of the interrupt handler; the first insn saves SYSCFG to the stack in all
handlers.
Signed-off-by: Bernd Schmidt <bernds_cb1@t-online.de>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'include/asm-blackfin/mach-common')
| -rw-r--r-- | include/asm-blackfin/mach-common/context.S | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/include/asm-blackfin/mach-common/context.S b/include/asm-blackfin/mach-common/context.S index fd0ebe1862b8..c0e630edfb9a 100644 --- a/include/asm-blackfin/mach-common/context.S +++ b/include/asm-blackfin/mach-common/context.S @@ -28,6 +28,11 @@ */ /* + * NOTE! The single-stepping code assumes that all interrupt handlers + * start by saving SYSCFG on the stack with their first instruction. + */ + +/* * Code to save processor context. * We even save the register which are preserved by a function call * - r4, r5, r6, r7, p3, p4, p5 |
