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author | Linus Torvalds <torvalds@g5.osdl.org> | 2006-03-28 13:53:03 -0800 |
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committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-03-28 13:53:03 -0800 |
commit | ca9ba4471c1203bb6e759b76e83167fec54fe590 (patch) | |
tree | 8aeb359631742f77f635cb5ff785bea9132502f9 /include/asm-arm/system.h | |
parent | d4965b3e2ff94d0c7b7e6e7e9794b54950a2f4b9 (diff) | |
parent | c4713074375c61f939310b04e92090afe29810dc (diff) | |
download | talos-op-linux-ca9ba4471c1203bb6e759b76e83167fec54fe590.tar.gz talos-op-linux-ca9ba4471c1203bb6e759b76e83167fec54fe590.zip |
Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm:
[ARM] 3388/1: ixp23xx: add core ixp23xx support
[ARM] 3417/1: add support for logicpd pxa270 card engine
[ARM] 3387/1: ixp23xx: add defconfig
[ARM] 3377/2: add support for intel xsc3 core
[ARM] Move ice-dcc code into misc.c
[ARM] Fix decompressor serial IO to give CRLF not LFCR
[ARM] proc-v6: mark page table walks outer-cacheable, shared. Enable NX.
[ARM] nommu: trivial patch for arch/arm/lib/Makefile
[ARM] 3416/1: Update LART site URL
[ARM] 3415/1: Akita: Add missing EXPORT_SYMBOL
[ARM] 3414/1: ep93xx: reset ethernet controller before uncompressing
Diffstat (limited to 'include/asm-arm/system.h')
-rw-r--r-- | include/asm-arm/system.h | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/include/asm-arm/system.h b/include/asm-arm/system.h index ec91d1ff032a..95b3abf4851b 100644 --- a/include/asm-arm/system.h +++ b/include/asm-arm/system.h @@ -108,6 +108,25 @@ extern void __show_regs(struct pt_regs *); extern int cpu_architecture(void); extern void cpu_init(void); +/* + * Intel's XScale3 core supports some v6 features (supersections, L2) + * but advertises itself as v5 as it does not support the v6 ISA. For + * this reason, we need a way to explicitly test for this type of CPU. + */ +#ifndef CONFIG_CPU_XSC3 +#define cpu_is_xsc3() 0 +#else +static inline int cpu_is_xsc3(void) +{ + extern unsigned int processor_id; + + if ((processor_id & 0xffffe000) == 0x69056000) + return 1; + + return 0; +} +#endif + #define set_cr(x) \ __asm__ __volatile__( \ "mcr p15, 0, %0, c1, c0, 0 @ set CR" \ |