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author | Andrew Victor <andrew@sanpeople.com> | 2007-02-08 09:00:39 +0100 |
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committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2007-02-08 14:55:22 +0000 |
commit | d0760b3bc8ff9b34e3e2e166e2102548a24751b4 (patch) | |
tree | 1ff9a9acf479b75e2d8dc23f1b894e5ac12c8d1d /include/asm-arm/arch-at91/at91sam9260_matrix.h | |
parent | 9d0412680e6c7b685ee466842047bcfb924d6dc5 (diff) | |
download | talos-op-linux-d0760b3bc8ff9b34e3e2e166e2102548a24751b4.tar.gz talos-op-linux-d0760b3bc8ff9b34e3e2e166e2102548a24751b4.zip |
[ARM] 4143/1: AT91: Prepare for AT91SAM9263 support
The Atmel AT91SAM9263 processor includes many more integrated
peripherals than Atmel's previous ARM9-based AT91 processors, so this
has necessitated a few changes to the core AT91 support.
These changes are:
* The system peripheral I/O region we remap has increased from
0xFFFA0000..0xFFFFFFFF to 0xFFF78000..0xFFFFFFFF.
* The increased I/O region forces changes to entry-macro.S and
debug-macro.S due to ARM's limited immediate offset addressing
modes.
* Maximum number of GPIO banks increases to 5.
* 2 MMC controllers so the board-setup code needs to specify which
controller it wishes to use when calling at91_add_device_mmc().
Original patch from Nicolas Ferre.
Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-at91/at91sam9260_matrix.h')
-rw-r--r-- | include/asm-arm/arch-at91/at91sam9260_matrix.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/asm-arm/arch-at91/at91sam9260_matrix.h b/include/asm-arm/arch-at91/at91sam9260_matrix.h index 573e97a47d22..aacb1e976422 100644 --- a/include/asm-arm/arch-at91/at91sam9260_matrix.h +++ b/include/asm-arm/arch-at91/at91sam9260_matrix.h @@ -18,7 +18,7 @@ #define AT91_MATRIX_MCFG2 (AT91_MATRIX + 0x08) /* Master Configuration Register 2 */ #define AT91_MATRIX_MCFG3 (AT91_MATRIX + 0x0C) /* Master Configuration Register 3 */ #define AT91_MATRIX_MCFG4 (AT91_MATRIX + 0x10) /* Master Configuration Register 4 */ -#define AT91_MATRIX_MCFG5 (AT91_MATRIX + 0x04) /* Master Configuration Register 5 */ +#define AT91_MATRIX_MCFG5 (AT91_MATRIX + 0x14) /* Master Configuration Register 5 */ #define AT91_MATRIX_ULBT (7 << 0) /* Undefined Length Burst Type */ #define AT91_MATRIX_ULBT_INFINITE (0 << 0) #define AT91_MATRIX_ULBT_SINGLE (1 << 0) |