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authorKen Wilson <ken.wilson@opengear.com>2015-01-16 13:10:47 +1000
committerMark Brown <broonie@kernel.org>2015-01-16 12:38:54 +0000
commit23244404e2ae788b19245adb1eb604cce1270e72 (patch)
treeb504f6d2a56eb8ae4792db3cb6a95b5c19dfc230 /drivers/spi
parent75872ebe96d3e78e86840f51dd4b7ca0abeacd6e (diff)
downloadtalos-op-linux-23244404e2ae788b19245adb1eb604cce1270e72.tar.gz
talos-op-linux-23244404e2ae788b19245adb1eb604cce1270e72.zip
spi: orion: Add multiple chip select support to spi-orion
This commit adds support for multiple hardware chip selects to spi-orion. Different SoCs support different number of chip selects (up to 8 on some platforms). The driver allows up to this number, and it is up to the implementer to only use the chip selects that are available. Signed-off-by: Ken Wilson <ken.wilson@opengear.com> Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi')
-rw-r--r--drivers/spi/spi-orion.c15
1 files changed, 14 insertions, 1 deletions
diff --git a/drivers/spi/spi-orion.c b/drivers/spi/spi-orion.c
index 98f1a8491b27..861664776672 100644
--- a/drivers/spi/spi-orion.c
+++ b/drivers/spi/spi-orion.c
@@ -28,7 +28,12 @@
/* Runtime PM autosuspend timeout: PM is fairly light on this driver */
#define SPI_AUTOSUSPEND_TIMEOUT 200
-#define ORION_NUM_CHIPSELECTS 1 /* only one slave is supported*/
+/* Some SoCs using this driver support up to 8 chip selects.
+ * It is up to the implementer to only use the chip selects
+ * that are available.
+ */
+#define ORION_NUM_CHIPSELECTS 8
+
#define ORION_SPI_WAIT_RDY_MAX_LOOP 2000 /* in usec */
#define ORION_SPI_IF_CTRL_REG 0x00
@@ -44,6 +49,10 @@
#define ARMADA_SPI_CLK_PRESCALE_MASK 0xDF
#define ORION_SPI_MODE_MASK (ORION_SPI_MODE_CPOL | \
ORION_SPI_MODE_CPHA)
+#define ORION_SPI_CS_MASK 0x1C
+#define ORION_SPI_CS_SHIFT 2
+#define ORION_SPI_CS(cs) ((cs << ORION_SPI_CS_SHIFT) & \
+ ORION_SPI_CS_MASK)
enum orion_spi_type {
ORION_SPI,
@@ -221,6 +230,10 @@ static void orion_spi_set_cs(struct spi_device *spi, bool enable)
orion_spi = spi_master_get_devdata(spi->master);
+ orion_spi_clrbits(orion_spi, ORION_SPI_IF_CTRL_REG, ORION_SPI_CS_MASK);
+ orion_spi_setbits(orion_spi, ORION_SPI_IF_CTRL_REG,
+ ORION_SPI_CS(spi->chip_select));
+
/* Chip select logic is inverted from spi_set_cs */
if (!enable)
orion_spi_setbits(orion_spi, ORION_SPI_IF_CTRL_REG, 0x1);
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