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authorAlexander Duyck <alexander.h.duyck@intel.com>2010-03-22 14:07:26 +0000
committerDavid S. Miller <davem@davemloft.net>2010-03-22 18:30:04 -0700
commit411f557c3accbaa1e2b378d29aeaffffbec39ccc (patch)
treed607cf553bb58092b0fdd2f1a1ad84d3d79da2c7 /drivers/net/igb
parent33e2bf6aa16061bae1253514e7c32af27d2b4b31 (diff)
downloadtalos-op-linux-411f557c3accbaa1e2b378d29aeaffffbec39ccc.tar.gz
talos-op-linux-411f557c3accbaa1e2b378d29aeaffffbec39ccc.zip
igb: Do not overwrite mdicnfg register when accessing 82580 phy
This change removes the extra configuration we were doing on the mdicnfg register which should be set by EEPROM and which we should not need to write again afterwards. This code was a holdover from some earlier development work that was being done on a board with an incomplete EEPROM and is no longer needed now that the production EEPROMs are in place. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/igb')
-rw-r--r--drivers/net/igb/e1000_82575.c20
1 files changed, 0 insertions, 20 deletions
diff --git a/drivers/net/igb/e1000_82575.c b/drivers/net/igb/e1000_82575.c
index 0bc990ec4a8e..ea944f518215 100644
--- a/drivers/net/igb/e1000_82575.c
+++ b/drivers/net/igb/e1000_82575.c
@@ -1446,7 +1446,6 @@ void igb_vmdq_set_replication_pf(struct e1000_hw *hw, bool enable)
**/
static s32 igb_read_phy_reg_82580(struct e1000_hw *hw, u32 offset, u16 *data)
{
- u32 mdicnfg = 0;
s32 ret_val;
@@ -1454,15 +1453,6 @@ static s32 igb_read_phy_reg_82580(struct e1000_hw *hw, u32 offset, u16 *data)
if (ret_val)
goto out;
- /*
- * We config the phy address in MDICNFG register now. Same bits
- * as before. The values in MDIC can be written but will be
- * ignored. This allows us to call the old function after
- * configuring the PHY address in the new register
- */
- mdicnfg = (hw->phy.addr << E1000_MDIC_PHY_SHIFT);
- wr32(E1000_MDICNFG, mdicnfg);
-
ret_val = igb_read_phy_reg_mdic(hw, offset, data);
hw->phy.ops.release(hw);
@@ -1481,7 +1471,6 @@ out:
**/
static s32 igb_write_phy_reg_82580(struct e1000_hw *hw, u32 offset, u16 data)
{
- u32 mdicnfg = 0;
s32 ret_val;
@@ -1489,15 +1478,6 @@ static s32 igb_write_phy_reg_82580(struct e1000_hw *hw, u32 offset, u16 data)
if (ret_val)
goto out;
- /*
- * We config the phy address in MDICNFG register now. Same bits
- * as before. The values in MDIC can be written but will be
- * ignored. This allows us to call the old function after
- * configuring the PHY address in the new register
- */
- mdicnfg = (hw->phy.addr << E1000_MDIC_PHY_SHIFT);
- wr32(E1000_MDICNFG, mdicnfg);
-
ret_val = igb_write_phy_reg_mdic(hw, offset, data);
hw->phy.ops.release(hw);
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