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authorChinh T Cao <chinh.t.cao@intel.com>2019-02-08 12:50:52 -0800
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>2019-03-19 16:52:47 -0700
commitd8df260af70f8b8a9f23466f569c820a90e91696 (patch)
treea4a33416d9875f09fa43fb213799ba1b2fdef85c /drivers/net/ethernet/intel/ice/ice_adminq_cmd.h
parent16c3301b55668fe8b163cad5c6b4d064bfa7c6fc (diff)
downloadtalos-op-linux-d8df260af70f8b8a9f23466f569c820a90e91696.tar.gz
talos-op-linux-d8df260af70f8b8a9f23466f569c820a90e91696.zip
ice : Ensure only valid bits are set in ice_aq_set_phy_cfg
In the ice_aq_set_phy_cfg AQ command, the 16.4 bit is reserved. This patch will make sure that this bit will never be set to 1. Signed-off-by: Chinh T Cao <chinh.t.cao@intel.com> Reviewed-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Anirudh Venkataramanan <anirudh.venkataramanan@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net/ethernet/intel/ice/ice_adminq_cmd.h')
-rw-r--r--drivers/net/ethernet/intel/ice/ice_adminq_cmd.h5
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h
index 242c78469181..8ff438968199 100644
--- a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h
+++ b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h
@@ -953,8 +953,9 @@ struct ice_aqc_set_phy_cfg_data {
__le64 phy_type_low; /* Use values from ICE_PHY_TYPE_LOW_* */
__le64 phy_type_high; /* Use values from ICE_PHY_TYPE_HIGH_* */
u8 caps;
-#define ICE_AQ_PHY_ENA_TX_PAUSE_ABILITY BIT(0)
-#define ICE_AQ_PHY_ENA_RX_PAUSE_ABILITY BIT(1)
+#define ICE_AQ_PHY_ENA_VALID_MASK ICE_M(0xef, 0)
+#define ICE_AQ_PHY_ENA_TX_PAUSE_ABILITY BIT(0)
+#define ICE_AQ_PHY_ENA_RX_PAUSE_ABILITY BIT(1)
#define ICE_AQ_PHY_ENA_LOW_POWER BIT(2)
#define ICE_AQ_PHY_ENA_LINK BIT(3)
#define ICE_AQ_PHY_ENA_AUTO_LINK_UPDT BIT(5)
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