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authorMark Brown <broonie@opensource.wolfsonmicro.com>2013-03-19 14:47:47 +0100
committerSamuel Ortiz <sameo@linux.intel.com>2013-04-08 15:20:59 +0200
commit247fa1920deeb1064e36c0a34410f4d63503b3d4 (patch)
treefa104f7fcc95dbeaf8e012af5347f56994573096 /drivers/mfd/arizona-core.c
parent7adafc5d97c0e23f1eac1cf1ee98d514026e7915 (diff)
downloadtalos-op-linux-247fa1920deeb1064e36c0a34410f4d63503b3d4.tar.gz
talos-op-linux-247fa1920deeb1064e36c0a34410f4d63503b3d4.zip
mfd: arizona: Fully support the use of MCLK1 as the 32kHz clock source
MCLK1 is not in the AoD power domain so if it is used as the 32kHz clock source we need to hold a runtime PM reference to keep the device from going into low power mode. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
Diffstat (limited to 'drivers/mfd/arizona-core.c')
-rw-r--r--drivers/mfd/arizona-core.c21
1 files changed, 19 insertions, 2 deletions
diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c
index dd679e8601da..c2c969391291 100644
--- a/drivers/mfd/arizona-core.c
+++ b/drivers/mfd/arizona-core.c
@@ -39,11 +39,21 @@ int arizona_clk32k_enable(struct arizona *arizona)
arizona->clk32k_ref++;
- if (arizona->clk32k_ref == 1)
+ if (arizona->clk32k_ref == 1) {
+ switch (arizona->pdata.clk32k_src) {
+ case ARIZONA_32KZ_MCLK1:
+ ret = pm_runtime_get_sync(arizona->dev);
+ if (ret != 0)
+ goto out;
+ break;
+ }
+
ret = regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
ARIZONA_CLK_32K_ENA,
ARIZONA_CLK_32K_ENA);
+ }
+out:
if (ret != 0)
arizona->clk32k_ref--;
@@ -63,10 +73,17 @@ int arizona_clk32k_disable(struct arizona *arizona)
arizona->clk32k_ref--;
- if (arizona->clk32k_ref == 0)
+ if (arizona->clk32k_ref == 0) {
regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
ARIZONA_CLK_32K_ENA, 0);
+ switch (arizona->pdata.clk32k_src) {
+ case ARIZONA_32KZ_MCLK1:
+ pm_runtime_put_sync(arizona->dev);
+ break;
+ }
+ }
+
mutex_unlock(&arizona->clk_lock);
return ret;
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