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authorLaurent Pinchart <laurent.pinchart@ideasonboard.com>2014-03-08 00:44:38 +0100
committerLaurent Pinchart <laurent.pinchart@ideasonboard.com>2014-04-16 16:30:18 +0200
commit286f600bc890347f7ec7bd50d33210d53a9095a3 (patch)
treee6af94983a711b69aeb5f5208fc6082d3ab3442d /drivers/iommu/omap-iommu.c
parent67b779d28d6e8afdd79a70423324273018114cad (diff)
downloadtalos-op-linux-286f600bc890347f7ec7bd50d33210d53a9095a3.tar.gz
talos-op-linux-286f600bc890347f7ec7bd50d33210d53a9095a3.zip
iommu/omap: Fix map protection value handling
The prot flags passed to the IOMMU map handler are defined in include/linux/iommu.h as IOMMU_(READ|WRITE|CACHE|EXEC). However, the driver expects to receive MMU_RAM_* OMAP-specific flags. This causes IOMMU flags being interpreted as page sizes, leading to failures. Hardcode the OMAP mapping parameters to little-endian, 8-bits and non-mixed page attributes. Furthermore, as the OMAP IOMMU doesn't support read-only or write-only mappings, ignore the prot value. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Sakari Ailus <sakari.ailus@iki.fi> Acked-by: Suman Anna <s-anna@ti.com>
Diffstat (limited to 'drivers/iommu/omap-iommu.c')
-rw-r--r--drivers/iommu/omap-iommu.c17
1 files changed, 7 insertions, 10 deletions
diff --git a/drivers/iommu/omap-iommu.c b/drivers/iommu/omap-iommu.c
index 31cebf20285c..895af06a667f 100644
--- a/drivers/iommu/omap-iommu.c
+++ b/drivers/iommu/omap-iommu.c
@@ -1041,8 +1041,7 @@ static void iopte_cachep_ctor(void *iopte)
clean_dcache_area(iopte, IOPTE_TABLE_SIZE);
}
-static u32 iotlb_init_entry(struct iotlb_entry *e, u32 da, u32 pa,
- u32 flags)
+static u32 iotlb_init_entry(struct iotlb_entry *e, u32 da, u32 pa, int pgsz)
{
memset(e, 0, sizeof(*e));
@@ -1050,10 +1049,10 @@ static u32 iotlb_init_entry(struct iotlb_entry *e, u32 da, u32 pa,
e->pa = pa;
e->valid = MMU_CAM_V;
/* FIXME: add OMAP1 support */
- e->pgsz = flags & MMU_CAM_PGSZ_MASK;
- e->endian = flags & MMU_RAM_ENDIAN_MASK;
- e->elsz = flags & MMU_RAM_ELSZ_MASK;
- e->mixed = flags & MMU_RAM_MIXED_MASK;
+ e->pgsz = pgsz;
+ e->endian = MMU_RAM_ENDIAN_LITTLE;
+ e->elsz = MMU_RAM_ELSZ_8;
+ e->mixed = 0;
return iopgsz_to_bytes(e->pgsz);
}
@@ -1066,7 +1065,7 @@ static int omap_iommu_map(struct iommu_domain *domain, unsigned long da,
struct device *dev = oiommu->dev;
struct iotlb_entry e;
int omap_pgsz;
- u32 ret, flags;
+ u32 ret;
omap_pgsz = bytes_to_iopgsz(bytes);
if (omap_pgsz < 0) {
@@ -1076,9 +1075,7 @@ static int omap_iommu_map(struct iommu_domain *domain, unsigned long da,
dev_dbg(dev, "mapping da 0x%lx to pa 0x%x size 0x%x\n", da, pa, bytes);
- flags = omap_pgsz | prot;
-
- iotlb_init_entry(&e, da, pa, flags);
+ iotlb_init_entry(&e, da, pa, omap_pgsz);
ret = omap_iopgtable_store_entry(oiommu, &e);
if (ret)
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