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| author | Damien Lespiau <damien.lespiau@intel.com> | 2012-10-19 17:55:43 +0100 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-10-20 01:01:48 +0200 |
| commit | 29de6ce574870a0d3fd157afdbf51c0282e2bf63 (patch) | |
| tree | 93f1712851275a98c923907aa1c4f8fa15b1b3de /drivers/gpu/drm | |
| parent | 4d47e4f57f0a821f5ba84b8e101ee7e44e4ffae6 (diff) | |
| download | talos-op-linux-29de6ce574870a0d3fd157afdbf51c0282e2bf63.tar.gz talos-op-linux-29de6ce574870a0d3fd157afdbf51c0282e2bf63.zip | |
drm/i915: Don't program DSPCLK_GATE_D twice on IVB and VLV
We were programming register 0x42020 twice on those platforms. Once
should be enough.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index a0804ebdfd68..30ae8f55a45a 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -3498,11 +3498,8 @@ static void ivybridge_init_clock_gating(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; int pipe; - uint32_t dspclk_gate = ILK_VRHUNIT_CLOCK_GATE_DISABLE; uint32_t snpcr; - I915_WRITE(ILK_DSPCLK_GATE_D, dspclk_gate); - I915_WRITE(WM3_LP_ILK, 0); I915_WRITE(WM2_LP_ILK, 0); I915_WRITE(WM1_LP_ILK, 0); @@ -3580,9 +3577,6 @@ static void valleyview_init_clock_gating(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; int pipe; - uint32_t dspclk_gate = ILK_VRHUNIT_CLOCK_GATE_DISABLE; - - I915_WRITE(ILK_DSPCLK_GATE_D, dspclk_gate); I915_WRITE(WM3_LP_ILK, 0); I915_WRITE(WM2_LP_ILK, 0); |
