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author | Ben Widawsky <benjamin.widawsky@intel.com> | 2013-11-11 14:46:28 -0800 |
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committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-11-14 09:33:12 +0100 |
commit | 596cc11e7a4a89bf6c45f955402d0bd0c7d51f13 (patch) | |
tree | 172fe238de946a2f8d6f2f09bce5db622decf33f /drivers/gpu/drm/vmwgfx/vmwgfx_gmr.c | |
parent | 3a2ffb65eec6dbda2fd8151894f51c18b42c8d41 (diff) | |
download | talos-op-linux-596cc11e7a4a89bf6c45f955402d0bd0c7d51f13.tar.gz talos-op-linux-596cc11e7a4a89bf6c45f955402d0bd0c7d51f13.zip |
drm/i915/bdw: PIPE_[BC] I[ME]R moved to powerwell
The pipe B and pipe C interrupt mask and enable registers are now part
of the pipe, so disabling the pipe power wells will lost the contests of
the registers.
Art totally debugged this one!
v2: Use the irq_lock to clarify code, and prevent future bugs (Daniel)
Cc: Art Runyan <arthur.j.runyan@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
[danvet: Make sparse happy.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/vmwgfx/vmwgfx_gmr.c')
0 files changed, 0 insertions, 0 deletions