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author | Christian König <christian.koenig@amd.com> | 2014-07-23 09:47:58 +0200 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2014-07-23 11:35:36 -0400 |
commit | e8c214d22e76dd0ead38f97f8d2dc09aac70d651 (patch) | |
tree | 3cb74e68e44c75a0d2231bda9ca6634397f3773e /drivers/gpu/drm/radeon/evergreen.c | |
parent | 5b7532756382cb31748f73df6a0af0138390c04f (diff) | |
download | talos-op-linux-e8c214d22e76dd0ead38f97f8d2dc09aac70d651.tar.gz talos-op-linux-e8c214d22e76dd0ead38f97f8d2dc09aac70d651.zip |
drm/radeon: fix irq ring buffer overflow handling
We must mask out the overflow bit as well, otherwise
the wptr will never match the rptr again and the interrupt
handler will loop forever.
Signed-off-by: Christian König <christian.koenig@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/evergreen.c')
-rw-r--r-- | drivers/gpu/drm/radeon/evergreen.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index 250bac3935a4..15e4f28015e1 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c @@ -4756,6 +4756,7 @@ static u32 evergreen_get_ih_wptr(struct radeon_device *rdev) tmp = RREG32(IH_RB_CNTL); tmp |= IH_WPTR_OVERFLOW_CLEAR; WREG32(IH_RB_CNTL, tmp); + wptr &= ~RB_OVERFLOW; } return (wptr & rdev->ih.ptr_mask); } |