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authorAlex Deucher <alexander.deucher@amd.com>2011-10-26 15:59:50 -0400
committerDave Airlie <airlied@redhat.com>2011-11-01 16:04:57 +0000
commit996d5c59006cd970dd3a9007aa1f76532909bae2 (patch)
treed7b7fd7a900c042b9d1c48bf1f13c86d03cccf46 /drivers/gpu/drm/radeon/atombios_crtc.c
parentc41384f8279f6eeecfe186976f67c2a513f3c81b (diff)
downloadtalos-op-linux-996d5c59006cd970dd3a9007aa1f76532909bae2.tar.gz
talos-op-linux-996d5c59006cd970dd3a9007aa1f76532909bae2.zip
drm/radeon/kms: check for DP MST mode in a few more places (v2)
DP MST is DP multi-stream support, part of DP 1.2. v2: switch to a helper macro as suggested by Michel. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/atombios_crtc.c')
-rw-r--r--drivers/gpu/drm/radeon/atombios_crtc.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c
index 9bb3d6f3b7be..87921c88a95c 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -638,7 +638,7 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc,
if (ss_enabled && ss->percentage)
args.v3.sInput.ucDispPllConfig |=
DISPPLL_CONFIG_SS_ENABLE;
- if (encoder_mode == ATOM_ENCODER_MODE_DP) {
+ if (ENCODER_MODE_IS_DP(encoder_mode)) {
args.v3.sInput.ucDispPllConfig |=
DISPPLL_CONFIG_COHERENT_MODE;
/* 16200 or 27000 */
@@ -930,6 +930,7 @@ static void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode
bpc = connector->display_info.bpc;
switch (encoder_mode) {
+ case ATOM_ENCODER_MODE_DP_MST:
case ATOM_ENCODER_MODE_DP:
/* DP/eDP */
dp_clock = dig_connector->dp_clock / 10;
@@ -1435,7 +1436,7 @@ static int radeon_atom_pick_pll(struct drm_crtc *crtc)
* PPLL/DCPLL programming and only program the DP DTO for the
* crtc virtual pixel clock.
*/
- if (atombios_get_encoder_mode(test_encoder) == ATOM_ENCODER_MODE_DP) {
+ if (ENCODER_MODE_IS_DP(atombios_get_encoder_mode(test_encoder))) {
if (ASIC_IS_DCE5(rdev) || rdev->clock.dp_extclk)
return ATOM_PPLL_INVALID;
}
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