diff options
author | Ben Skeggs <bskeggs@redhat.com> | 2015-08-20 14:54:17 +1000 |
---|---|---|
committer | Ben Skeggs <bskeggs@redhat.com> | 2015-08-28 12:40:37 +1000 |
commit | f027f49166171c98d5945af12ac3ee9bc9f9bf4c (patch) | |
tree | d7d9127836c9082ce9f8d6cd16a820a6662f37b4 /drivers/gpu/drm/nouveau/nvkm/engine | |
parent | 227c95d90a3c50defbc7b4f98605e13af4e6214c (diff) | |
download | talos-op-linux-f027f49166171c98d5945af12ac3ee9bc9f9bf4c.tar.gz talos-op-linux-f027f49166171c98d5945af12ac3ee9bc9f9bf4c.zip |
drm/nouveau/gpuobj: separate allocation from nvkm_object
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nvkm/engine')
-rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/base.c | 52 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/gf100.c | 19 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/gf110.c | 26 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/nv04.c | 23 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/nv50.c | 31 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/priv.h | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/fifo/base.c | 5 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/fifo/g84.c | 53 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c | 10 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c | 10 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c | 28 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv40.c | 28 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv50.c | 35 |
13 files changed, 155 insertions, 167 deletions
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/base.c index f9f38ee49058..7f9870789a0f 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/base.c @@ -24,32 +24,74 @@ #include "priv.h" #include <core/client.h> +#include <core/gpuobj.h> #include <subdev/fb.h> #include <subdev/instmem.h> #include <nvif/class.h> #include <nvif/unpack.h> +struct hack { + struct nvkm_gpuobj object; + struct nvkm_gpuobj *parent; +}; + +static void +dtor(struct nvkm_object *object) +{ + struct hack *hack = (void *)object; + nvkm_gpuobj_del(&hack->parent); + nvkm_object_destroy(&hack->object.object); +} + +static struct nvkm_oclass +hack = { + .handle = NV_GPUOBJ_CLASS, + .ofuncs = &(struct nvkm_ofuncs) { + .dtor = dtor, + .init = _nvkm_object_init, + .fini = _nvkm_object_fini, + }, +}; + static int -nvkm_dmaobj_bind(struct nvkm_dmaobj *dmaobj, struct nvkm_object *parent, +nvkm_dmaobj_bind(struct nvkm_dmaobj *dmaobj, struct nvkm_gpuobj *pargpu, struct nvkm_gpuobj **pgpuobj) { const struct nvkm_dmaeng_impl *impl = (void *) nv_oclass(nv_object(dmaobj)->engine); int ret = 0; - if (nv_object(dmaobj) == parent) { /* ctor bind */ + if (&dmaobj->base == &pargpu->object) { /* ctor bind */ + struct nvkm_object *parent = (void *)pargpu; + struct hack *object; + if (nv_mclass(parent->parent) == NV_DEVICE) { /* delayed, or no, binding */ return 0; } - ret = impl->bind(dmaobj, parent, pgpuobj); - if (ret == 0) + + pargpu = (void *)nv_pclass((void *)pargpu, NV_GPUOBJ_CLASS); + + ret = nvkm_object_create(parent, NULL, &hack, NV_GPUOBJ_CLASS, &object); + if (ret == 0) { nvkm_object_ref(NULL, &parent); + *pgpuobj = &object->object; + + ret = impl->bind(dmaobj, pargpu, &object->parent); + if (ret) + return ret; + + object->object.node = object->parent->node; + object->object.addr = object->parent->addr; + object->object.size = object->parent->size; + return 0; + } + return ret; } - return impl->bind(dmaobj, parent, pgpuobj); + return impl->bind(dmaobj, pargpu, pgpuobj); } int diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/gf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/gf100.c index 499a7c7e024a..96a604de4b63 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/gf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/gf100.c @@ -37,25 +37,14 @@ struct gf100_dmaobj { }; static int -gf100_dmaobj_bind(struct nvkm_dmaobj *obj, struct nvkm_object *parent, +gf100_dmaobj_bind(struct nvkm_dmaobj *obj, struct nvkm_gpuobj *parent, struct nvkm_gpuobj **pgpuobj) { struct gf100_dmaobj *dmaobj = container_of(obj, typeof(*dmaobj), base); + struct nvkm_device *device = dmaobj->base.base.engine->subdev.device; int ret; - if (!nv_iclass(parent, NV_ENGCTX_CLASS)) { - switch (nv_mclass(parent->parent)) { - case GT214_DISP_CORE_CHANNEL_DMA: - case GT214_DISP_BASE_CHANNEL_DMA: - case GT214_DISP_OVERLAY_CHANNEL_DMA: - break; - default: - return -EINVAL; - } - } else - return 0; - - ret = nvkm_gpuobj_new(parent, parent, 24, 32, 0, pgpuobj); + ret = nvkm_gpuobj_new(device, 24, 32, false, parent, pgpuobj); if (ret == 0) { nvkm_kmap(*pgpuobj); nvkm_wo32(*pgpuobj, 0x00, dmaobj->flags0 | nv_mclass(dmaobj)); @@ -146,7 +135,7 @@ gf100_dmaobj_ctor(struct nvkm_object *parent, struct nvkm_object *engine, break; } - return dmaeng->bind(&dmaobj->base, nv_object(dmaobj), (void *)pobject); + return dmaeng->bind(&dmaobj->base, (void *)dmaobj, (void *)pobject); } static struct nvkm_ofuncs diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/gf110.c b/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/gf110.c index a28cf56454e4..017c7a2affe5 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/gf110.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/gf110.c @@ -36,32 +36,14 @@ struct gf110_dmaobj { }; static int -gf110_dmaobj_bind(struct nvkm_dmaobj *obj, struct nvkm_object *parent, +gf110_dmaobj_bind(struct nvkm_dmaobj *obj, struct nvkm_gpuobj *parent, struct nvkm_gpuobj **pgpuobj) { struct gf110_dmaobj *dmaobj = container_of(obj, typeof(*dmaobj), base); + struct nvkm_device *device = dmaobj->base.base.engine->subdev.device; int ret; - if (!nv_iclass(parent, NV_ENGCTX_CLASS)) { - switch (nv_mclass(parent->parent)) { - case GF110_DISP_CORE_CHANNEL_DMA: - case GK104_DISP_CORE_CHANNEL_DMA: - case GK110_DISP_CORE_CHANNEL_DMA: - case GM107_DISP_CORE_CHANNEL_DMA: - case GM204_DISP_CORE_CHANNEL_DMA: - case GF110_DISP_BASE_CHANNEL_DMA: - case GK104_DISP_BASE_CHANNEL_DMA: - case GK110_DISP_BASE_CHANNEL_DMA: - case GF110_DISP_OVERLAY_CONTROL_DMA: - case GK104_DISP_OVERLAY_CONTROL_DMA: - break; - default: - return -EINVAL; - } - } else - return 0; - - ret = nvkm_gpuobj_new(parent, parent, 24, 32, 0, pgpuobj); + ret = nvkm_gpuobj_new(device, 24, 32, false, parent, pgpuobj); if (ret == 0) { nvkm_kmap(*pgpuobj); nvkm_wo32(*pgpuobj, 0x00, dmaobj->flags0); @@ -135,7 +117,7 @@ gf110_dmaobj_ctor(struct nvkm_object *parent, struct nvkm_object *engine, return -EINVAL; } - return dmaeng->bind(&dmaobj->base, nv_object(dmaobj), (void *)pobject); + return dmaeng->bind(&dmaobj->base, (void *)dmaobj, (void *)pobject); } static struct nvkm_ofuncs diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/nv04.c b/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/nv04.c index 9c68eb0e4a70..6be2dfc70cb7 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/nv04.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/nv04.c @@ -37,41 +37,28 @@ struct nv04_dmaobj { }; static int -nv04_dmaobj_bind(struct nvkm_dmaobj *obj, struct nvkm_object *parent, +nv04_dmaobj_bind(struct nvkm_dmaobj *obj, struct nvkm_gpuobj *parent, struct nvkm_gpuobj **pgpuobj) { struct nv04_dmaobj *dmaobj = container_of(obj, typeof(*dmaobj), base); - struct nvkm_gpuobj *gpuobj; + struct nvkm_device *device = dmaobj->base.base.engine->subdev.device; u64 offset = dmaobj->base.start & 0xfffff000; u64 adjust = dmaobj->base.start & 0x00000fff; u32 length = dmaobj->base.limit - dmaobj->base.start; int ret; - if (!nv_iclass(parent, NV_ENGCTX_CLASS)) { - switch (nv_mclass(parent->parent)) { - case NV03_CHANNEL_DMA: - case NV10_CHANNEL_DMA: - case NV17_CHANNEL_DMA: - case NV40_CHANNEL_DMA: - break; - default: - return -EINVAL; - } - } - if (dmaobj->clone) { struct nv04_mmu *mmu = nv04_mmu(dmaobj); struct nvkm_memory *pgt = mmu->vm->pgt[0].mem[0]; if (!dmaobj->base.start) - return nvkm_gpuobj_dup(parent, pgt, pgpuobj); + return nvkm_gpuobj_wrap(pgt, pgpuobj); nvkm_kmap(pgt); offset = nvkm_ro32(pgt, 8 + (offset >> 10)); offset &= 0xfffff000; nvkm_done(pgt); } - ret = nvkm_gpuobj_new(parent, parent, 16, 16, 0, &gpuobj); - *pgpuobj = gpuobj; + ret = nvkm_gpuobj_new(device, 16, 16, false, parent, pgpuobj); if (ret == 0) { nvkm_kmap(*pgpuobj); nvkm_wo32(*pgpuobj, 0x00, dmaobj->flags0 | (adjust << 20)); @@ -134,7 +121,7 @@ nv04_dmaobj_ctor(struct nvkm_object *parent, struct nvkm_object *engine, return -EINVAL; } - return dmaeng->bind(&dmaobj->base, nv_object(dmaobj), (void *)pobject); + return dmaeng->bind(&dmaobj->base, (void *)dmaobj, (void *)pobject); } static struct nvkm_ofuncs diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/nv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/nv50.c index 3566fa9b3ba9..f87134ec5b34 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/nv50.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/nv50.c @@ -37,37 +37,14 @@ struct nv50_dmaobj { }; static int -nv50_dmaobj_bind(struct nvkm_dmaobj *obj, struct nvkm_object *parent, +nv50_dmaobj_bind(struct nvkm_dmaobj *obj, struct nvkm_gpuobj *parent, struct nvkm_gpuobj **pgpuobj) { struct nv50_dmaobj *dmaobj = container_of(obj, typeof(*dmaobj), base); + struct nvkm_device *device = dmaobj->base.base.engine->subdev.device; int ret; - if (!nv_iclass(parent, NV_ENGCTX_CLASS)) { - switch (nv_mclass(parent->parent)) { - case NV40_CHANNEL_DMA: - case NV50_CHANNEL_GPFIFO: - case G82_CHANNEL_GPFIFO: - case NV50_DISP_CORE_CHANNEL_DMA: - case G82_DISP_CORE_CHANNEL_DMA: - case GT206_DISP_CORE_CHANNEL_DMA: - case GT200_DISP_CORE_CHANNEL_DMA: - case GT214_DISP_CORE_CHANNEL_DMA: - case NV50_DISP_BASE_CHANNEL_DMA: - case G82_DISP_BASE_CHANNEL_DMA: - case GT200_DISP_BASE_CHANNEL_DMA: - case GT214_DISP_BASE_CHANNEL_DMA: - case NV50_DISP_OVERLAY_CHANNEL_DMA: - case G82_DISP_OVERLAY_CHANNEL_DMA: - case GT200_DISP_OVERLAY_CHANNEL_DMA: - case GT214_DISP_OVERLAY_CHANNEL_DMA: - break; - default: - return -EINVAL; - } - } - - ret = nvkm_gpuobj_new(parent, parent, 24, 32, 0, pgpuobj); + ret = nvkm_gpuobj_new(device, 24, 32, false, parent, pgpuobj); if (ret == 0) { nvkm_kmap(*pgpuobj); nvkm_wo32(*pgpuobj, 0x00, dmaobj->flags0 | nv_mclass(dmaobj)); @@ -164,7 +141,7 @@ nv50_dmaobj_ctor(struct nvkm_object *parent, struct nvkm_object *engine, return -EINVAL; } - return dmaeng->bind(&dmaobj->base, nv_object(dmaobj), (void *)pobject); + return dmaeng->bind(&dmaobj->base, (void *)dmaobj, (void *)pobject); } static struct nvkm_ofuncs diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/priv.h b/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/priv.h index c4c210bdbf7e..614d9e697bd4 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/priv.h +++ b/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/priv.h @@ -22,7 +22,7 @@ int _nvkm_dmaeng_ctor(struct nvkm_object *, struct nvkm_object *, struct nvkm_dmaeng_impl { struct nvkm_oclass base; struct nvkm_oclass *sclass; - int (*bind)(struct nvkm_dmaobj *, struct nvkm_object *, + int (*bind)(struct nvkm_dmaobj *, struct nvkm_gpuobj *, struct nvkm_gpuobj **); }; #endif diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/base.c index f937d705d668..1934dfb5a434 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/base.c @@ -61,6 +61,7 @@ nvkm_fifo_channel_create_(struct nvkm_object *parent, struct nvkm_handle *handle; struct nvkm_dmaobj *dmaobj; struct nvkm_fifo *fifo = (void *)engine; + struct nvkm_fifo_base *base = (void *)parent; struct nvkm_fifo_chan *chan; struct nvkm_dmaeng *dmaeng; struct nvkm_subdev *subdev = &fifo->engine.subdev; @@ -91,7 +92,7 @@ nvkm_fifo_channel_create_(struct nvkm_object *parent, return -EINVAL; } - ret = dmaeng->bind(dmaobj, parent, &chan->pushgpu); + ret = dmaeng->bind(dmaobj, &base->gpuobj, &chan->pushgpu); if (ret) return ret; } @@ -131,7 +132,7 @@ nvkm_fifo_channel_destroy(struct nvkm_fifo_chan *chan) fifo->channel[chan->chid] = NULL; spin_unlock_irqrestore(&fifo->lock, flags); - nvkm_gpuobj_ref(NULL, &chan->pushgpu); + nvkm_gpuobj_del(&chan->pushgpu); nvkm_namedb_destroy(&chan->namedb); } diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/g84.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/g84.c index 96c6835e9f14..058296b2f285 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/g84.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/g84.c @@ -140,23 +140,25 @@ g84_fifo_object_attach(struct nvkm_object *parent, else context = 0x00000004; /* just non-zero */ - switch (nv_engidx(object->engine)) { - case NVDEV_ENGINE_DMAOBJ: - case NVDEV_ENGINE_SW : context |= 0x00000000; break; - case NVDEV_ENGINE_GR : context |= 0x00100000; break; - case NVDEV_ENGINE_MPEG : - case NVDEV_ENGINE_MSPPP : context |= 0x00200000; break; - case NVDEV_ENGINE_ME : - case NVDEV_ENGINE_CE0 : context |= 0x00300000; break; - case NVDEV_ENGINE_VP : - case NVDEV_ENGINE_MSPDEC: context |= 0x00400000; break; - case NVDEV_ENGINE_CIPHER: - case NVDEV_ENGINE_SEC : - case NVDEV_ENGINE_VIC : context |= 0x00500000; break; - case NVDEV_ENGINE_BSP : - case NVDEV_ENGINE_MSVLD : context |= 0x00600000; break; - default: - return -EINVAL; + if (object->engine) { + switch (nv_engidx(object->engine)) { + case NVDEV_ENGINE_DMAOBJ: + case NVDEV_ENGINE_SW : context |= 0x00000000; break; + case NVDEV_ENGINE_GR : context |= 0x00100000; break; + case NVDEV_ENGINE_MPEG : + case NVDEV_ENGINE_MSPPP : context |= 0x00200000; break; + case NVDEV_ENGINE_ME : + case NVDEV_ENGINE_CE0 : context |= 0x00300000; break; + case NVDEV_ENGINE_VP : + case NVDEV_ENGINE_MSPDEC: context |= 0x00400000; break; + case NVDEV_ENGINE_CIPHER: + case NVDEV_ENGINE_SEC : + case NVDEV_ENGINE_VIC : context |= 0x00500000; break; + case NVDEV_ENGINE_BSP : + case NVDEV_ENGINE_MSVLD : context |= 0x00600000; break; + default: + return -EINVAL; + } } return nvkm_ramht_insert(chan->ramht, 0, handle, context); @@ -374,6 +376,7 @@ g84_fifo_context_ctor(struct nvkm_object *parent, struct nvkm_object *engine, struct nvkm_oclass *oclass, void *data, u32 size, struct nvkm_object **pobject) { + struct nvkm_device *device = nv_engine(engine)->subdev.device; struct nv50_fifo_base *base; int ret; @@ -383,13 +386,13 @@ g84_fifo_context_ctor(struct nvkm_object *parent, struct nvkm_object *engine, if (ret) return ret; - ret = nvkm_gpuobj_new(nv_object(base), nv_object(base), 0x0200, 0, - NVOBJ_FLAG_ZERO_ALLOC, &base->eng); + ret = nvkm_gpuobj_new(device, 0x0200, 0, true, &base->base.gpuobj, + &base->eng); if (ret) return ret; - ret = nvkm_gpuobj_new(nv_object(base), nv_object(base), 0x4000, 0, - 0, &base->pgd); + ret = nvkm_gpuobj_new(device, 0x4000, 0, false, &base->base.gpuobj, + &base->pgd); if (ret) return ret; @@ -397,13 +400,13 @@ g84_fifo_context_ctor(struct nvkm_object *parent, struct nvkm_object *engine, if (ret) return ret; - ret = nvkm_gpuobj_new(nv_object(base), nv_object(base), 0x1000, - 0x400, NVOBJ_FLAG_ZERO_ALLOC, &base->cache); + ret = nvkm_gpuobj_new(device, 0x1000, 0x400, true, &base->base.gpuobj, + &base->cache); if (ret) return ret; - ret = nvkm_gpuobj_new(nv_object(base), nv_object(base), 0x0100, - 0x100, NVOBJ_FLAG_ZERO_ALLOC, &base->ramfc); + ret = nvkm_gpuobj_new(device, 0x100, 0x100, true, &base->base.gpuobj, + &base->ramfc); if (ret) return ret; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c index cbb8d249e7fb..77b8df1f57fb 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c @@ -130,8 +130,8 @@ gf100_fifo_context_attach(struct nvkm_object *parent, } if (!ectx->vma.node) { - ret = nvkm_gpuobj_map_vm(nv_gpuobj(ectx), base->vm, - NV_MEM_ACCESS_RW, &ectx->vma); + ret = nvkm_gpuobj_map(nv_gpuobj(ectx), base->vm, + NV_MEM_ACCESS_RW, &ectx->vma); if (ret) return ret; @@ -334,6 +334,7 @@ gf100_fifo_context_ctor(struct nvkm_object *parent, struct nvkm_object *engine, struct nvkm_oclass *oclass, void *data, u32 size, struct nvkm_object **pobject) { + struct nvkm_device *device = nv_engine(engine)->subdev.device; struct gf100_fifo_base *base; int ret; @@ -344,8 +345,7 @@ gf100_fifo_context_ctor(struct nvkm_object *parent, struct nvkm_object *engine, if (ret) return ret; - ret = nvkm_gpuobj_new(nv_object(base), NULL, 0x10000, 0x1000, 0, - &base->pgd); + ret = nvkm_gpuobj_new(device, 0x10000, 0x1000, false, NULL, &base->pgd); if (ret) return ret; @@ -368,7 +368,7 @@ gf100_fifo_context_dtor(struct nvkm_object *object) { struct gf100_fifo_base *base = (void *)object; nvkm_vm_ref(NULL, &base->vm, base->pgd); - nvkm_gpuobj_ref(NULL, &base->pgd); + nvkm_gpuobj_del(&base->pgd); nvkm_fifo_context_destroy(&base->base); } diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c index 0e8356d5fa02..39dae1a28dd1 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c @@ -154,8 +154,8 @@ gk104_fifo_context_attach(struct nvkm_object *parent, } if (!ectx->vma.node) { - ret = nvkm_gpuobj_map_vm(nv_gpuobj(ectx), base->vm, - NV_MEM_ACCESS_RW, &ectx->vma); + ret = nvkm_gpuobj_map(nv_gpuobj(ectx), base->vm, + NV_MEM_ACCESS_RW, &ectx->vma); if (ret) return ret; @@ -388,6 +388,7 @@ gk104_fifo_context_ctor(struct nvkm_object *parent, struct nvkm_object *engine, struct nvkm_oclass *oclass, void *data, u32 size, struct nvkm_object **pobject) { + struct nvkm_device *device = nv_engine(engine)->subdev.device; struct gk104_fifo_base *base; int ret; @@ -397,8 +398,7 @@ gk104_fifo_context_ctor(struct nvkm_object *parent, struct nvkm_object *engine, if (ret) return ret; - ret = nvkm_gpuobj_new(nv_object(base), NULL, 0x10000, 0x1000, 0, - &base->pgd); + ret = nvkm_gpuobj_new(device, 0x10000, 0x1000, false, NULL, &base->pgd); if (ret) return ret; @@ -421,7 +421,7 @@ gk104_fifo_context_dtor(struct nvkm_object *object) { struct gk104_fifo_base *base = (void *)object; nvkm_vm_ref(NULL, &base->vm, base->pgd); - nvkm_gpuobj_ref(NULL, &base->pgd); + nvkm_gpuobj_del(&base->pgd); nvkm_fifo_context_destroy(&base->base); } diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c index f0fd1ce8f671..4bec70730558 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c @@ -65,19 +65,21 @@ nv04_fifo_object_attach(struct nvkm_object *parent, else context = 0x00000004; /* just non-zero */ - switch (nv_engidx(object->engine)) { - case NVDEV_ENGINE_DMAOBJ: - case NVDEV_ENGINE_SW: - context |= 0x00000000; - break; - case NVDEV_ENGINE_GR: - context |= 0x00010000; - break; - case NVDEV_ENGINE_MPEG: - context |= 0x00020000; - break; - default: - return -EINVAL; + if (object->engine) { + switch (nv_engidx(object->engine)) { + case NVDEV_ENGINE_DMAOBJ: + case NVDEV_ENGINE_SW: + context |= 0x00000000; + break; + case NVDEV_ENGINE_GR: + context |= 0x00010000; + break; + case NVDEV_ENGINE_MPEG: + context |= 0x00020000; + break; + default: + return -EINVAL; + } } context |= 0x80000000; /* valid */ diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv40.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv40.c index eb6588ec0b6d..a2d8da8a9341 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv40.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv40.c @@ -78,19 +78,21 @@ nv40_fifo_object_attach(struct nvkm_object *parent, else context = 0x00000004; /* just non-zero */ - switch (nv_engidx(object->engine)) { - case NVDEV_ENGINE_DMAOBJ: - case NVDEV_ENGINE_SW: - context |= 0x00000000; - break; - case NVDEV_ENGINE_GR: - context |= 0x00100000; - break; - case NVDEV_ENGINE_MPEG: - context |= 0x00200000; - break; - default: - return -EINVAL; + if (object->engine) { + switch (nv_engidx(object->engine)) { + case NVDEV_ENGINE_DMAOBJ: + case NVDEV_ENGINE_SW: + context |= 0x00000000; + break; + case NVDEV_ENGINE_GR: + context |= 0x00100000; + break; + case NVDEV_ENGINE_MPEG: + context |= 0x00200000; + break; + default: + return -EINVAL; + } } context |= chid << 23; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv50.c index 96e5b61daf10..620c0cfb2453 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv50.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv50.c @@ -171,13 +171,15 @@ nv50_fifo_object_attach(struct nvkm_object *parent, else context = 0x00000004; /* just non-zero */ - switch (nv_engidx(object->engine)) { - case NVDEV_ENGINE_DMAOBJ: - case NVDEV_ENGINE_SW : context |= 0x00000000; break; - case NVDEV_ENGINE_GR : context |= 0x00100000; break; - case NVDEV_ENGINE_MPEG : context |= 0x00200000; break; - default: - return -EINVAL; + if (object->engine) { + switch (nv_engidx(object->engine)) { + case NVDEV_ENGINE_DMAOBJ: + case NVDEV_ENGINE_SW : context |= 0x00000000; break; + case NVDEV_ENGINE_GR : context |= 0x00100000; break; + case NVDEV_ENGINE_MPEG : context |= 0x00200000; break; + default: + return -EINVAL; + } } return nvkm_ramht_insert(chan->ramht, 0, handle, context); @@ -402,6 +404,7 @@ nv50_fifo_context_ctor(struct nvkm_object *parent, struct nvkm_object *engine, struct nvkm_oclass *oclass, void *data, u32 size, struct nvkm_object **pobject) { + struct nvkm_device *device = nv_engine(engine)->subdev.device; struct nv50_fifo_base *base; int ret; @@ -411,17 +414,17 @@ nv50_fifo_context_ctor(struct nvkm_object *parent, struct nvkm_object *engine, if (ret) return ret; - ret = nvkm_gpuobj_new(nv_object(base), nv_object(base), 0x0200, - 0x1000, NVOBJ_FLAG_ZERO_ALLOC, &base->ramfc); + ret = nvkm_gpuobj_new(device, 0x0200, 0x1000, true, &base->base.gpuobj, + &base->ramfc); if (ret) return ret; - ret = nvkm_gpuobj_new(nv_object(base), nv_object(base), 0x1200, 0, - NVOBJ_FLAG_ZERO_ALLOC, &base->eng); + ret = nvkm_gpuobj_new(device, 0x1200, 0, true, &base->base.gpuobj, + &base->eng); if (ret) return ret; - ret = nvkm_gpuobj_new(nv_object(base), nv_object(base), 0x4000, 0, 0, + ret = nvkm_gpuobj_new(device, 0x4000, 0, false, &base->base.gpuobj, &base->pgd); if (ret) return ret; @@ -438,10 +441,10 @@ nv50_fifo_context_dtor(struct nvkm_object *object) { struct nv50_fifo_base *base = (void *)object; nvkm_vm_ref(NULL, &base->vm, base->pgd); - nvkm_gpuobj_ref(NULL, &base->pgd); - nvkm_gpuobj_ref(NULL, &base->eng); - nvkm_gpuobj_ref(NULL, &base->ramfc); - nvkm_gpuobj_ref(NULL, &base->cache); + nvkm_gpuobj_del(&base->pgd); + nvkm_gpuobj_del(&base->eng); + nvkm_gpuobj_del(&base->ramfc); + nvkm_gpuobj_del(&base->cache); nvkm_fifo_context_destroy(&base->base); } |