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| author | Ben Skeggs <bskeggs@redhat.com> | 2010-09-16 16:25:26 +1000 |
|---|---|---|
| committer | Ben Skeggs <bskeggs@redhat.com> | 2010-09-24 16:27:13 +1000 |
| commit | 442b626ece6fbbe7f52c03a09f85ae5755f29eab (patch) | |
| tree | 923e916c7a8ff361ea1ad16e91c219a661d75c27 /drivers/gpu/drm/nouveau/nouveau_hw.c | |
| parent | 02c30ca0a1d6d8b878fc32f47b3b25192ef4a8ef (diff) | |
| download | talos-op-linux-442b626ece6fbbe7f52c03a09f85ae5755f29eab.tar.gz talos-op-linux-442b626ece6fbbe7f52c03a09f85ae5755f29eab.zip | |
drm/nv04-nv40: import initial pm backend
Currently just hooked up to the already-existing nouveau_hw, which should
handle all relevant chipsets as well as we currently can.
This will likely be eventually split out and improved into chipset specific
code at a later point.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nouveau_hw.c')
| -rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_hw.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_hw.c b/drivers/gpu/drm/nouveau/nouveau_hw.c index e228aafc03e0..ebcf8a8190c2 100644 --- a/drivers/gpu/drm/nouveau/nouveau_hw.c +++ b/drivers/gpu/drm/nouveau/nouveau_hw.c @@ -431,7 +431,8 @@ nouveau_hw_get_pllvals(struct drm_device *dev, enum pll_types plltype, struct pll_lims pll_lim; int ret; - BUG_ON(reg1 == 0); + if (reg1 == 0) + return -ENOENT; pll1 = nvReadMC(dev, reg1); @@ -480,6 +481,7 @@ int nouveau_hw_get_clock(struct drm_device *dev, enum pll_types plltype) { struct nouveau_pll_vals pllvals; + int ret; if (plltype == PLL_MEMORY && (dev->pci_device & 0x0ff0) == CHIPSET_NFORCE) { @@ -499,7 +501,9 @@ nouveau_hw_get_clock(struct drm_device *dev, enum pll_types plltype) return clock; } - nouveau_hw_get_pllvals(dev, plltype, &pllvals); + ret = nouveau_hw_get_pllvals(dev, plltype, &pllvals); + if (ret) + return ret; return nouveau_hw_pllvals_to_clk(&pllvals); } |
