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| author | Paulo Zanoni <paulo.r.zanoni@intel.com> | 2013-03-22 14:24:16 -0300 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-03-23 13:33:50 +0100 |
| commit | 4f3308b9754cb0a4467ccaca4f3ccee42d803620 (patch) | |
| tree | 49795ec3a368d93dbb657e5185253051abc1695b /drivers/gpu/drm/i915 | |
| parent | 80ca378b7675c04038afae02b33b4b7d48811d2d (diff) | |
| download | talos-op-linux-4f3308b9754cb0a4467ccaca4f3ccee42d803620.tar.gz talos-op-linux-4f3308b9754cb0a4467ccaca4f3ccee42d803620.zip | |
drm/i915: there's no PIPESTAT on HAS_PCH_SPLIT platforms
So don't read it when capturing the error state. This solves
"unclaimed register" messages on Haswell when we have a GPU hang.
V2: Check for HAS_PCH_SPLIT instead of Gen5+ because VLV still has
this register.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_irq.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 5fc178e1e515..3c2b05c3cefe 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -1387,8 +1387,9 @@ static void i915_capture_error_state(struct drm_device *dev) else if (INTEL_INFO(dev)->gen == 6) error->forcewake = I915_READ(FORCEWAKE); - for_each_pipe(pipe) - error->pipestat[pipe] = I915_READ(PIPESTAT(pipe)); + if (!HAS_PCH_SPLIT(dev)) + for_each_pipe(pipe) + error->pipestat[pipe] = I915_READ(PIPESTAT(pipe)); if (INTEL_INFO(dev)->gen >= 6) { error->error = I915_READ(ERROR_GEN6); |
