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| author | Carl Worth <cworth@cworth.org> | 2010-04-08 23:31:57 -0700 |
|---|---|---|
| committer | Eric Anholt <eric@anholt.net> | 2010-04-12 09:24:01 -0700 |
| commit | cfecde435dda78248d6fcdc424bed68d5db6be0b (patch) | |
| tree | 2547e303da20b2cba17322075b6b7777d719cac8 /drivers/gpu/drm/i915 | |
| parent | ea059a1ec4496a10f94ca9d0c1b530faf1b85dce (diff) | |
| download | talos-op-linux-cfecde435dda78248d6fcdc424bed68d5db6be0b.tar.gz talos-op-linux-cfecde435dda78248d6fcdc424bed68d5db6be0b.zip | |
drm/i915: Don't enable pipe/plane/VCO early (wait for DPMS on).
The existing code handling the DPMS ON event is much more careful to
ensure that these registers are enabled according to strict sequencing
requirements. Enabling these early in mode_set simply defeats that.
Signed-off-by: Carl Worth <cworth@cworth.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'drivers/gpu/drm/i915')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 3ee68bcce7b0..243dfb80cd92 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -3463,11 +3463,6 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc, pipeconf &= ~PIPEACONF_DOUBLE_WIDE; } - dspcntr |= DISPLAY_PLANE_ENABLE; - pipeconf |= PIPEACONF_ENABLE; - dpll |= DPLL_VCO_ENABLE; - - /* Disable the panel fitter if it was on our pipe */ if (!HAS_PCH_SPLIT(dev) && intel_panel_fitter_pipe(dev) == pipe) I915_WRITE(PFIT_CONTROL, 0); |
