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| author | Imre Deak <imre.deak@intel.com> | 2015-09-03 16:24:36 +0300 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2015-09-04 10:18:51 +0200 |
| commit | 96d12cbdbd03a9ce87a75520512ef9ad8c585e92 (patch) | |
| tree | 62da0d080f38fb9418206107d49b4f1a3894deb3 /drivers/gpu/drm/i915/intel_bios.h | |
| parent | c5796b7126b2497513bfa9a9341d02cb833d83d6 (diff) | |
| download | talos-op-linux-96d12cbdbd03a9ce87a75520512ef9ad8c585e92.tar.gz talos-op-linux-96d12cbdbd03a9ce87a75520512ef9ad8c585e92.zip | |
drm/i915: access the PP_ON_DELAYS/PP_OFF_DELAYS regs only pre GEN5
These registers exist only before GEN5, so currently we may access
undefined registers on VLV/CHV and BXT. Apply the workaround only pre
GEN5.
Since the workaround is relevant only when LVDS is present, for clarity
apply it only if this is the case.
This triggered an unclaimed register access warning on BXT.
v2: (Ville)
- move the workaround to the LVDS init code
- print a debug note about the workaround
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_bios.h')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_bios.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_bios.h b/drivers/gpu/drm/i915/intel_bios.h index 46cd5c7ebacd..1b7417e3131b 100644 --- a/drivers/gpu/drm/i915/intel_bios.h +++ b/drivers/gpu/drm/i915/intel_bios.h @@ -588,7 +588,6 @@ struct bdb_psr { struct psr_table psr_table[16]; } __packed; -void intel_setup_bios(struct drm_device *dev); int intel_parse_bios(struct drm_device *dev); /* |
