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author | Arnd Bergmann <arnd@arndb.de> | 2012-02-28 12:42:14 +0000 |
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committer | Arnd Bergmann <arnd@arndb.de> | 2012-02-28 12:42:21 +0000 |
commit | fb0b82b32ce17564bc64cede50bf4a3204eecc60 (patch) | |
tree | 00b5e466074c6fb373d64c493b3341186024acc7 /drivers/gpu/drm/i915/i915_reg.h | |
parent | a173fc693b25216c5c834978f4fafd731fd4ff94 (diff) | |
parent | 43de6a7dda6e9a7345e218e688f2092f991126f0 (diff) | |
download | talos-op-linux-fb0b82b32ce17564bc64cede50bf4a3204eecc60.tar.gz talos-op-linux-fb0b82b32ce17564bc64cede50bf4a3204eecc60.zip |
Merge branch 'board-specific' of git://github.com/hzhuang1/linux into next/boards
* 'board-specific' of git://github.com/hzhuang1/linux: (5 commits)
ARM: pxa: add dummy clock for pxa25x and pxa27x
ARM: mmp: append irq name of gpio device
pxa/hx4700: Fix PXA_GPIO_IRQ_BASE/IRQ_NUM values
pxa/hx4700: Add ASIC3 LED support
pxa/hx4700: Correct StrataFlash block size discovery
(update to v3.3-rc5)
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
-rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index c3afb783cb9d..03c53fcf8653 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -3028,6 +3028,20 @@ #define DISP_TILE_SURFACE_SWIZZLING (1<<13) #define DISP_FBC_WM_DIS (1<<15) +/* GEN7 chicken */ +#define GEN7_COMMON_SLICE_CHICKEN1 0x7010 +# define GEN7_CSC1_RHWO_OPT_DISABLE_IN_RCC ((1<<10) | (1<<26)) + +#define GEN7_L3CNTLREG1 0xB01C +#define GEN7_WA_FOR_GEN7_L3_CONTROL 0x3C4FFF8C + +#define GEN7_L3_CHICKEN_MODE_REGISTER 0xB030 +#define GEN7_WA_L3_CHICKEN_MODE 0x20000000 + +/* WaCatErrorRejectionIssue */ +#define GEN7_SQ_CHICKEN_MBCUNIT_CONFIG 0x9030 +#define GEN7_SQ_CHICKEN_MBCUNIT_SQINTMOB (1<<11) + /* PCH */ /* south display engine interrupt */ @@ -3618,6 +3632,7 @@ #define GT_FIFO_NUM_RESERVED_ENTRIES 20 #define GEN6_UCGCTL2 0x9404 +# define GEN6_RCZUNIT_CLOCK_GATE_DISABLE (1 << 13) # define GEN6_RCPBUNIT_CLOCK_GATE_DISABLE (1 << 12) # define GEN6_RCCUNIT_CLOCK_GATE_DISABLE (1 << 11) |