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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2010-12-14 13:35:47 -0800 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-12-14 13:35:47 -0800 |
| commit | 5d43a1de26f37080b75d7c0cf2a0b97523457568 (patch) | |
| tree | 824aa8c3a2ee1ce231aa30d2643f21b66c03c919 /drivers/dma/fsldma.h | |
| parent | 7103b71b0ff6a5d8d71438e63dfc539a6f0a61bd (diff) | |
| parent | 59a609d9b59be9452f168fe228befea53d5962ff (diff) | |
| download | talos-op-linux-5d43a1de26f37080b75d7c0cf2a0b97523457568.tar.gz talos-op-linux-5d43a1de26f37080b75d7c0cf2a0b97523457568.zip | |
Merge branch 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx
* 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx:
dmaengine: at_hdmac: fix buffer transfer size specification
fsldma: fix issue of slow dma
dmaengine i.MX SDMA: initialize on module_init
dma : EG20T PCH: Fix miss-setting DMA descriptor
intel_mid_dma: fix section mismatch warnings
dmaengine: imx-sdma: fix bug in buffer descriptor initialization
drivers/dma/ppc4xx: Use printf extension %pR for struct resource
drivers/dma/ioat: Use the ccflag-y instead of EXTRA_CFLAGS
drivers/dma/: Use the ccflag-y instead of EXTRA_CFLAGS
dma: intel_mid_dma: fix double free on mid_setup_dma error path
dma: imx-dma: fix imxdma_probe error path
Diffstat (limited to 'drivers/dma/fsldma.h')
| -rw-r--r-- | drivers/dma/fsldma.h | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/drivers/dma/fsldma.h b/drivers/dma/fsldma.h index cb4d6ff51597..ba9f403c0fbe 100644 --- a/drivers/dma/fsldma.h +++ b/drivers/dma/fsldma.h @@ -1,5 +1,5 @@ /* - * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved. + * Copyright (C) 2007-2010 Freescale Semiconductor, Inc. All rights reserved. * * Author: * Zhang Wei <wei.zhang@freescale.com>, Jul 2007 @@ -36,6 +36,13 @@ #define FSL_DMA_MR_DAHE 0x00002000 #define FSL_DMA_MR_SAHE 0x00001000 +/* + * Bandwidth/pause control determines how many bytes a given + * channel is allowed to transfer before the DMA engine pauses + * the current channel and switches to the next channel + */ +#define FSL_DMA_MR_BWC 0x08000000 + /* Special MR definition for MPC8349 */ #define FSL_DMA_MR_EOTIE 0x00000080 #define FSL_DMA_MR_PRC_RM 0x00000800 |
