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authorTakashi Iwai <tiwai@suse.de>2015-07-24 20:08:13 +0200
committerTakashi Iwai <tiwai@suse.de>2015-07-24 20:08:13 +0200
commit43cbf02e7ad51007af38f39c5b2abdc7a5d7f5aa (patch)
tree1057babea8807af3f4a3c44fd116b7bbe99eb733 /drivers/clocksource/timer-sp.h
parentcba59972a1191a0c1647a52fe745eed7a4b34b38 (diff)
parent996034b117b467709dec7811ef134063934fa626 (diff)
downloadtalos-op-linux-43cbf02e7ad51007af38f39c5b2abdc7a5d7f5aa.tar.gz
talos-op-linux-43cbf02e7ad51007af38f39c5b2abdc7a5d7f5aa.zip
Merge tag 'asoc-fix-v4.2-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus
ASoC: Fixes for v4.2 A lot of small fixes here, a few to the core: - Fix for binding DAPM stream widgets on devices with prefixes assigned to them - Minor fixes for the newly added topology interfaces - Locking and memory leak fixes for DAPM - Driver specific fixes
Diffstat (limited to 'drivers/clocksource/timer-sp.h')
-rw-r--r--drivers/clocksource/timer-sp.h30
1 files changed, 30 insertions, 0 deletions
diff --git a/drivers/clocksource/timer-sp.h b/drivers/clocksource/timer-sp.h
new file mode 100644
index 000000000000..050d88561e9c
--- /dev/null
+++ b/drivers/clocksource/timer-sp.h
@@ -0,0 +1,30 @@
+/*
+ * ARM timer implementation, found in Integrator, Versatile and Realview
+ * platforms. Not all platforms support all registers and bits in these
+ * registers, so we mark them with A for Integrator AP, C for Integrator
+ * CP, V for Versatile and R for Realview.
+ *
+ * Integrator AP has 16-bit timers, Integrator CP, Versatile and Realview
+ * can have 16-bit or 32-bit selectable via a bit in the control register.
+ *
+ * Every SP804 contains two identical timers.
+ */
+#define TIMER_1_BASE 0x00
+#define TIMER_2_BASE 0x20
+
+#define TIMER_LOAD 0x00 /* ACVR rw */
+#define TIMER_VALUE 0x04 /* ACVR ro */
+#define TIMER_CTRL 0x08 /* ACVR rw */
+#define TIMER_CTRL_ONESHOT (1 << 0) /* CVR */
+#define TIMER_CTRL_32BIT (1 << 1) /* CVR */
+#define TIMER_CTRL_DIV1 (0 << 2) /* ACVR */
+#define TIMER_CTRL_DIV16 (1 << 2) /* ACVR */
+#define TIMER_CTRL_DIV256 (2 << 2) /* ACVR */
+#define TIMER_CTRL_IE (1 << 5) /* VR */
+#define TIMER_CTRL_PERIODIC (1 << 6) /* ACVR */
+#define TIMER_CTRL_ENABLE (1 << 7) /* ACVR */
+
+#define TIMER_INTCLR 0x0c /* ACVR wo */
+#define TIMER_RIS 0x10 /* CVR ro */
+#define TIMER_MIS 0x14 /* CVR ro */
+#define TIMER_BGLOAD 0x18 /* CVR rw */
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