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authorAlan Cox <alan@lxorguk.ukuu.org.uk>2007-11-05 15:04:40 +0000
committerJeff Garzik <jeff@garzik.org>2007-11-05 18:08:46 -0500
commit36beb82390235236c60eb97ca526b1cad97e2df3 (patch)
treeb109c9cd0fc5bb5f49cf8da22d84b874111a233e /drivers/ata/pata_serverworks.c
parent152af05cc85119d294b977ab4de07a781795c298 (diff)
downloadtalos-op-linux-36beb82390235236c60eb97ca526b1cad97e2df3.tar.gz
talos-op-linux-36beb82390235236c60eb97ca526b1cad97e2df3.zip
pata_serverworks: Fix problem with some drive combinations
The driver used the channel not the device number for deciding where to load some timing parameters. Also change so that we clear the UDMA field as the old driver did. Not believed neccessary but does no harm. Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/ata/pata_serverworks.c')
-rw-r--r--drivers/ata/pata_serverworks.c11
1 files changed, 5 insertions, 6 deletions
diff --git a/drivers/ata/pata_serverworks.c b/drivers/ata/pata_serverworks.c
index df68806df4be..8bed88873720 100644
--- a/drivers/ata/pata_serverworks.c
+++ b/drivers/ata/pata_serverworks.c
@@ -274,28 +274,27 @@ static void serverworks_set_dmamode(struct ata_port *ap, struct ata_device *adev
{
static const u8 dma_mode[] = { 0x77, 0x21, 0x20 };
int offset = 1 + 2 * ap->port_no - adev->devno;
- int devbits = (2 * ap->port_no + adev->devno);
+ int devbits = 2 * ap->port_no + adev->devno;
u8 ultra;
u8 ultra_cfg;
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
pci_read_config_byte(pdev, 0x54, &ultra_cfg);
+ pci_read_config_byte(pdev, 0x56 + ap->port_no, &ultra);
+ ultra &= ~(0x0F << (adev->devno * 4));
if (adev->dma_mode >= XFER_UDMA_0) {
pci_write_config_byte(pdev, 0x44 + offset, 0x20);
- pci_read_config_byte(pdev, 0x56 + ap->port_no, &ultra);
- ultra &= ~(0x0F << (ap->port_no * 4));
ultra |= (adev->dma_mode - XFER_UDMA_0)
- << (ap->port_no * 4);
- pci_write_config_byte(pdev, 0x56 + ap->port_no, ultra);
-
+ << (adev->devno * 4);
ultra_cfg |= (1 << devbits);
} else {
pci_write_config_byte(pdev, 0x44 + offset,
dma_mode[adev->dma_mode - XFER_MW_DMA_0]);
ultra_cfg &= ~(1 << devbits);
}
+ pci_write_config_byte(pdev, 0x56 + ap->port_no, ultra);
pci_write_config_byte(pdev, 0x54, ultra_cfg);
}
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