diff options
| author | Alexander Shishkin <virtuoso@slind.org> | 2010-08-04 11:25:20 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-08-10 22:10:53 +0100 |
| commit | 9e354ea8e0710baf05804168fdabe90231b3d363 (patch) | |
| tree | 3f86f2e6c8b7fd08256d9a2496583d0a21c51a05 /arch | |
| parent | 686ff22812d908eaa537edd62fb1eb3d64336301 (diff) | |
| download | talos-op-linux-9e354ea8e0710baf05804168fdabe90231b3d363.tar.gz talos-op-linux-9e354ea8e0710baf05804168fdabe90231b3d363.zip | |
ARM: 6292/1: coresight: add ETM management registers
Add notion of ETM OS lock, save and restore registers.
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Alexander Shishkin <virtuoso@slind.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/include/asm/hardware/coresight.h | 8 | ||||
| -rw-r--r-- | arch/arm/kernel/etm.c | 2 |
2 files changed, 7 insertions, 3 deletions
diff --git a/arch/arm/include/asm/hardware/coresight.h b/arch/arm/include/asm/hardware/coresight.h index f82b25d4f73e..212e47828c79 100644 --- a/arch/arm/include/asm/hardware/coresight.h +++ b/arch/arm/include/asm/hardware/coresight.h @@ -48,8 +48,6 @@ struct tracectx { /* CoreSight Component Registers */ #define CSCR_CLASS 0xff4 -#define CSCR_PRSR 0x314 - #define UNLOCK_MAGIC 0xc5acce55 /* ETM control register, "ETM Architecture", 3.3.1 */ @@ -132,6 +130,12 @@ struct tracectx { ETMCTRL_BRANCH_OUTPUT | \ ETMCTRL_DO_CONTEXTID) +/* ETM management registers, "ETM Architecture", 3.5.24 */ +#define ETMMR_OSLAR 0x300 +#define ETMMR_OSLSR 0x304 +#define ETMMR_OSSRR 0x308 +#define ETMMR_PDSR 0x314 + /* ETB registers, "CoreSight Components TRM", 9.3 */ #define ETBR_DEPTH 0x04 #define ETBR_STATUS 0x0c diff --git a/arch/arm/kernel/etm.c b/arch/arm/kernel/etm.c index 827753966301..9e9db63c298a 100644 --- a/arch/arm/kernel/etm.c +++ b/arch/arm/kernel/etm.c @@ -543,7 +543,7 @@ static int __init etm_probe(struct amba_device *dev, struct amba_id *id) t->etm_portsz = 1; etm_unlock(t); - ret = etm_readl(t, CSCR_PRSR); + ret = etm_readl(t, ETMMR_PDSR); t->ncmppairs = etm_readl(t, ETMR_CONFCODE) & 0xf; etm_writel(t, 0x440, ETMR_CTRL); |
