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| author | Juergen Gross <jgross@suse.com> | 2014-11-03 14:01:57 +0100 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2014-11-16 11:04:25 +0100 |
| commit | c06814d8419a74528500f85faf5fc01f67f8e7e6 (patch) | |
| tree | 04d1a57732fba19043c81ce92375d0f0bc8b9f63 /arch/x86/mm/pat_internal.h | |
| parent | 102e19e1955d85f31475416b1ee22980c6462cf8 (diff) | |
| download | talos-op-linux-c06814d8419a74528500f85faf5fc01f67f8e7e6.tar.gz talos-op-linux-c06814d8419a74528500f85faf5fc01f67f8e7e6.zip | |
x86: Use new cache mode type in setting page attributes
Instead of directly using the cache mode bits in the pte switch to
using the cache mode type in the functions for modifying page
attributes.
Based-on-patch-by: Stefan Bader <stefan.bader@canonical.com>
Signed-off-by: Juergen Gross <jgross@suse.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Cc: stefan.bader@canonical.com
Cc: xen-devel@lists.xensource.com
Cc: konrad.wilk@oracle.com
Cc: ville.syrjala@linux.intel.com
Cc: david.vrabel@citrix.com
Cc: jbeulich@suse.com
Cc: toshi.kani@hp.com
Cc: plagnioj@jcrosoft.com
Cc: tomi.valkeinen@ti.com
Cc: bhelgaas@google.com
Link: http://lkml.kernel.org/r/1415019724-4317-12-git-send-email-jgross@suse.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/x86/mm/pat_internal.h')
0 files changed, 0 insertions, 0 deletions
