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authorArnd Bergmann <arnd@arndb.de>2012-03-04 21:09:11 +0000
committerArnd Bergmann <arnd@arndb.de>2012-03-04 21:20:46 +0000
commit709baa67c676a187a63c0f0f40efceb3fb1eef72 (patch)
tree0a2b8bab5ac4f52069a1e50d20028ae44d8c256a /arch/x86/kernel/traps.c
parent281a9f78eaa5d0d78bd0e3acd181a24d3bad28e3 (diff)
parent8c690fdf465be9d97229f6bb0e6346624d6753a9 (diff)
downloadtalos-op-linux-709baa67c676a187a63c0f0f40efceb3fb1eef72.tar.gz
talos-op-linux-709baa67c676a187a63c0f0f40efceb3fb1eef72.zip
Merge tag 'tegra-soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/olof/tegra into tegra/soc2
From: Olof Johansson <olof@lixom.net> Tegra 30 SMP support I did this as a separate topic branch because it depends on both the soc and the soc-drivers branch, so it brings both of those in as a base. This branch contains work to enable SMP support on Tegra30 and reworks some of the SMP bringup for T20 as well. It also contains a device tree patch that builds on top of the SMP/clock changes in the rest of the branch, so it made more sense to apply it here than deal with the merge conflicts back and forth. * tag 'tegra-soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/olof/tegra: ARM: dt: Explicitly configure all serial ports on Tegra Cardhu ARM: tegra: support for secondary cores on Tegra30 ARM: tegra: support for Tegra30 CPU powerdomains ARM: tegra: add support for Tegra30 powerdomains ARM: tegra: export tegra_powergate_is_powered() ARM: tegra: prepare powergate.c for multiple variants ARM: tegra: rework Tegra secondary CPU core bringup ARM: tegra: functions to access the flowcontroller ARM: tegra: initialize Tegra chipid early ARM: tegra: export Tegra chipid ARM: tegra: cleanup use of chipid register Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/x86/kernel/traps.c')
-rw-r--r--arch/x86/kernel/traps.c43
1 files changed, 14 insertions, 29 deletions
diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c
index 482ec3af2067..4bbe04d96744 100644
--- a/arch/x86/kernel/traps.c
+++ b/arch/x86/kernel/traps.c
@@ -571,41 +571,18 @@ asmlinkage void __attribute__((weak)) smp_threshold_interrupt(void)
}
/*
- * __math_state_restore assumes that cr0.TS is already clear and the
- * fpu state is all ready for use. Used during context switch.
- */
-void __math_state_restore(void)
-{
- struct thread_info *thread = current_thread_info();
- struct task_struct *tsk = thread->task;
-
- /*
- * Paranoid restore. send a SIGSEGV if we fail to restore the state.
- */
- if (unlikely(restore_fpu_checking(tsk))) {
- stts();
- force_sig(SIGSEGV, tsk);
- return;
- }
-
- thread->status |= TS_USEDFPU; /* So we fnsave on switch_to() */
- tsk->fpu_counter++;
-}
-
-/*
* 'math_state_restore()' saves the current math information in the
* old math state array, and gets the new ones from the current task
*
* Careful.. There are problems with IBM-designed IRQ13 behaviour.
* Don't touch unless you *really* know how it works.
*
- * Must be called with kernel preemption disabled (in this case,
- * local interrupts are disabled at the call-site in entry.S).
+ * Must be called with kernel preemption disabled (eg with local
+ * local interrupts as in the case of do_device_not_available).
*/
-asmlinkage void math_state_restore(void)
+void math_state_restore(void)
{
- struct thread_info *thread = current_thread_info();
- struct task_struct *tsk = thread->task;
+ struct task_struct *tsk = current;
if (!tsk_used_math(tsk)) {
local_irq_enable();
@@ -622,9 +599,17 @@ asmlinkage void math_state_restore(void)
local_irq_disable();
}
- clts(); /* Allow maths ops (or we recurse) */
+ __thread_fpu_begin(tsk);
+ /*
+ * Paranoid restore. send a SIGSEGV if we fail to restore the state.
+ */
+ if (unlikely(restore_fpu_checking(tsk))) {
+ __thread_fpu_end(tsk);
+ force_sig(SIGSEGV, tsk);
+ return;
+ }
- __math_state_restore();
+ tsk->fpu_counter++;
}
EXPORT_SYMBOL_GPL(math_state_restore);
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