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author | David S. Miller <davem@hutch.davemloft.net> | 2007-06-04 17:01:39 -0700 |
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committer | David S. Miller <davem@sunset.davemloft.net> | 2007-06-04 21:50:00 -0700 |
commit | f78eae2e6f5d1eb05f76a45486286445b916bd92 (patch) | |
tree | 0fa81e104ad9891afcaf18cdcb413c4a0f2ee8da /arch/sparc64/kernel/smp.c | |
parent | d887ab3a9b1899f88b8cfba531e726b5fb2ebd14 (diff) | |
download | talos-op-linux-f78eae2e6f5d1eb05f76a45486286445b916bd92.tar.gz talos-op-linux-f78eae2e6f5d1eb05f76a45486286445b916bd92.zip |
[SPARC64]: Proper multi-core scheduling support.
The scheduling domain hierarchy is:
all cpus -->
cpus that share an instruction cache -->
cpus that share an integer execution unit
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc64/kernel/smp.c')
-rw-r--r-- | arch/sparc64/kernel/smp.c | 19 |
1 files changed, 18 insertions, 1 deletions
diff --git a/arch/sparc64/kernel/smp.c b/arch/sparc64/kernel/smp.c index c550bba3490a..68a45ac93375 100644 --- a/arch/sparc64/kernel/smp.c +++ b/arch/sparc64/kernel/smp.c @@ -51,6 +51,8 @@ cpumask_t cpu_online_map __read_mostly = CPU_MASK_NONE; cpumask_t phys_cpu_present_map __read_mostly = CPU_MASK_NONE; cpumask_t cpu_sibling_map[NR_CPUS] __read_mostly = { [0 ... NR_CPUS-1] = CPU_MASK_NONE }; +cpumask_t cpu_core_map[NR_CPUS] __read_mostly = + { [0 ... NR_CPUS-1] = CPU_MASK_NONE }; static cpumask_t smp_commenced_mask; static cpumask_t cpu_callout_map; @@ -1217,13 +1219,28 @@ void __devinit smp_fill_in_sib_core_maps(void) unsigned int j; if (cpu_data(i).core_id == 0) { - cpu_set(i, cpu_sibling_map[i]); + cpu_set(i, cpu_core_map[i]); continue; } for_each_possible_cpu(j) { if (cpu_data(i).core_id == cpu_data(j).core_id) + cpu_set(j, cpu_core_map[i]); + } + } + + for_each_possible_cpu(i) { + unsigned int j; + + if (cpu_data(i).proc_id == -1) { + cpu_set(i, cpu_sibling_map[i]); + continue; + } + + for_each_possible_cpu(j) { + if (cpu_data(i).proc_id == + cpu_data(j).proc_id) cpu_set(j, cpu_sibling_map[i]); } } |