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author | Michael Neuling <mikey@neuling.org> | 2012-06-25 13:33:10 +0000 |
---|---|---|
committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2012-07-10 19:17:55 +1000 |
commit | c75df6f96c59beed8632e3aced5fb4faabaa6c5b (patch) | |
tree | b21ce9394028ec4520a71d87391dad8ab29edd67 /arch/powerpc/net | |
parent | 564aa5cfd3e33ef69a5ca6c170a0fe79c6805e52 (diff) | |
download | talos-op-linux-c75df6f96c59beed8632e3aced5fb4faabaa6c5b.tar.gz talos-op-linux-c75df6f96c59beed8632e3aced5fb4faabaa6c5b.zip |
powerpc: Fix usage of register macros getting ready for %r0 change
Anything that uses a constructed instruction (ie. from ppc-opcode.h),
need to use the new R0 macro, as %r0 is not going to work.
Also convert usages of macros where we are just determining an offset
(usually for a load/store), like:
std r14,STK_REG(r14)(r1)
Can't use STK_REG(r14) as %r14 doesn't work in the STK_REG macro since
it's just calculating an offset.
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/net')
-rw-r--r-- | arch/powerpc/net/bpf_jit_comp.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/powerpc/net/bpf_jit_comp.c b/arch/powerpc/net/bpf_jit_comp.c index 2dc8b1484845..dd1130642d07 100644 --- a/arch/powerpc/net/bpf_jit_comp.c +++ b/arch/powerpc/net/bpf_jit_comp.c @@ -39,7 +39,7 @@ static void bpf_jit_build_prologue(struct sk_filter *fp, u32 *image, /* Make stackframe */ if (ctx->seen & SEEN_DATAREF) { /* If we call any helpers (for loads), save LR */ - EMIT(PPC_INST_MFLR | __PPC_RT(0)); + EMIT(PPC_INST_MFLR | __PPC_RT(R0)); PPC_STD(0, 1, 16); /* Back up non-volatile regs. */ @@ -56,7 +56,7 @@ static void bpf_jit_build_prologue(struct sk_filter *fp, u32 *image, PPC_STD(i, 1, -(8*(32-i))); } } - EMIT(PPC_INST_STDU | __PPC_RS(1) | __PPC_RA(1) | + EMIT(PPC_INST_STDU | __PPC_RS(R1) | __PPC_RA(R1) | (-BPF_PPC_STACKFRAME & 0xfffc)); } |