Merge master.kernel.org:/pub/scm/linux/kernel/git/paulus/powerpc

* master.kernel.org:/pub/scm/linux/kernel/git/paulus/powerpc: (116 commits)
  [POWERPC] Add export of vgacon_remap_base
  [POWERPC] Remove bogus comment about page_is_ram
  [POWERPC] windfarm: don't die on suspend thread signal
  [POWERPC] Fix comment in kernel/irq.c
  [POWERPC] ppc: Fix booke watchdog initialization
  [POWERPC] PPC: Use ARRAY_SIZE macro when appropriate
  [POWERPC] Use ARRAY_SIZE macro when appropriate
  [POWERPC] Fix ppc64's writing to struct file_operations
  [POWERPC] ppc: use syslog macro for the printk log level
  [POWERPC] ppc: cs4218_tdm remove extra brace
  [POWERPC] Add mpc52xx/lite5200 PCI support
  [POWERPC] Only use H_BULK_REMOVE if the firmware supports it
  [POWERPC] Fixup error handling when emulating a floating point instruction
  [POWERPC] Enable interrupts if we are doing fp math emulation
  [POWERPC] Added kprobes support to ppc32
  [POWERPC] Make pSeries use the H_BULK_REMOVE hypervisor call
  [POWERPC] Clear RI bit in MSR before restoring r13 when returning to userspace
  [POWERPC] Fix performance monitor exception
  [POWERPC] Compile fixes for arch/powerpc dcr code
  [POWERPC] Maple: use mmio nvram
  ...

1 files changed, 10 insertions, 14 deletions

diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c
index d1c0758c5611..77b4637097e9 100644
--- a/arch/powerpc/mm/mem.c
+++ b/arch/powerpc/mm/mem.c
@@ -61,10 +61,6 @@ unsigned long memory_limit;
 extern void hash_preload(struct mm_struct *mm, unsigned long ea,
 			 unsigned long access, unsigned long trap);
 
-/*
- * This is called by /dev/mem to know if a given address has to
- * be mapped non-cacheable or not
- */
 int page_is_ram(unsigned long pfn)
 {
 	unsigned long paddr = (pfn << PAGE_SHIFT);
@@ -490,19 +486,19 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long address,
 	    !cpu_has_feature(CPU_FTR_NOEXECUTE) &&
 	    pfn_valid(pfn)) {
 		struct page *page = pfn_to_page(pfn);
+#ifdef CONFIG_8xx
+		/* On 8xx, cache control instructions (particularly
+		 * "dcbst" from flush_dcache_icache) fault as write
+		 * operation if there is an unpopulated TLB entry
+		 * for the address in question. To workaround that,
+		 * we invalidate the TLB here, thus avoiding dcbst
+		 * misbehaviour.
+		 */
+		_tlbie(address);
+#endif
 		if (!PageReserved(page)
 		    && !test_bit(PG_arch_1, &page->flags)) {
 			if (vma->vm_mm == current->active_mm) {
-#ifdef CONFIG_8xx
-			/* On 8xx, cache control instructions (particularly 
-		 	 * "dcbst" from flush_dcache_icache) fault as write 
-			 * operation if there is an unpopulated TLB entry 
-			 * for the address in question. To workaround that, 
-			 * we invalidate the TLB here, thus avoiding dcbst 
-			 * misbehaviour.
-			 */
-				_tlbie(address);
-#endif
 				__flush_dcache_icache((void *) address);
 			} else
 				flush_dcache_icache_page(page);