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author | Alexander Graf <agraf@suse.de> | 2013-11-29 02:32:31 +0100 |
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committer | Alexander Graf <agraf@suse.de> | 2013-12-09 09:41:41 +0100 |
commit | 3d3319b45eea26df56c53aae1a65adf74c8ab12a (patch) | |
tree | 2a144b54eaab5cb52f1d88707dfcf3dbf0925566 /arch/powerpc/kvm/book3s_interrupts.S | |
parent | 40fdd8c88c4a5e9b26bfbed2215ac661f24aef07 (diff) | |
download | talos-op-linux-3d3319b45eea26df56c53aae1a65adf74c8ab12a.tar.gz talos-op-linux-3d3319b45eea26df56c53aae1a65adf74c8ab12a.zip |
KVM: PPC: Book3S: PR: Enable interrupts earlier
Now that the svcpu sync is interrupt aware we can enable interrupts
earlier in the exit code path again, moving 32bit and 64bit closer
together.
While at it, document the fact that we're always executing the exit
path with interrupts enabled so that the next person doesn't trap
over this.
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'arch/powerpc/kvm/book3s_interrupts.S')
-rw-r--r-- | arch/powerpc/kvm/book3s_interrupts.S | 6 |
1 files changed, 1 insertions, 5 deletions
diff --git a/arch/powerpc/kvm/book3s_interrupts.S b/arch/powerpc/kvm/book3s_interrupts.S index 5e7cb32ce4dc..f779450cb07c 100644 --- a/arch/powerpc/kvm/book3s_interrupts.S +++ b/arch/powerpc/kvm/book3s_interrupts.S @@ -129,6 +129,7 @@ kvm_start_lightweight: * R12 = exit handler id * R13 = PACA * SVCPU.* = guest * + * MSR.EE = 1 * */ @@ -148,11 +149,6 @@ kvm_start_lightweight: nop #ifdef CONFIG_PPC_BOOK3S_64 - /* Re-enable interrupts */ - ld r3, HSTATE_HOST_MSR(r13) - ori r3, r3, MSR_EE - MTMSR_EERI(r3) - /* * Reload kernel SPRG3 value. * No need to save guest value as usermode can't modify SPRG3. |