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authorAndreas Schwab <schwab@linux-m68k.org>2010-08-21 11:43:20 +0000
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2010-09-02 14:07:32 +1000
commit05d77ac90c0d260ae18decd70507dc4f5b71a2cb (patch)
tree84cca10e89f60d8530d9951e8e20931329154ef2 /arch/powerpc/kernel/fpu.S
parent872e439a45ed4a4bd499bc55cb0dffa74027f749 (diff)
downloadtalos-op-linux-05d77ac90c0d260ae18decd70507dc4f5b71a2cb.tar.gz
talos-op-linux-05d77ac90c0d260ae18decd70507dc4f5b71a2cb.zip
powerpc: Remove fpscr use from [kvm_]cvt_{fd,df}
Neither lfs nor stfs touch the fpscr, so remove the restore/save of it around them. Signed-off-by: Andreas Schwab <schwab@linux-m68k.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/kernel/fpu.S')
-rw-r--r--arch/powerpc/kernel/fpu.S10
1 files changed, 0 insertions, 10 deletions
diff --git a/arch/powerpc/kernel/fpu.S b/arch/powerpc/kernel/fpu.S
index fc8f5b14019c..e86c040ae585 100644
--- a/arch/powerpc/kernel/fpu.S
+++ b/arch/powerpc/kernel/fpu.S
@@ -163,24 +163,14 @@ END_FTR_SECTION_IFSET(CPU_FTR_VSX)
/*
* These are used in the alignment trap handler when emulating
* single-precision loads and stores.
- * We restore and save the fpscr so the task gets the same result
- * and exceptions as if the cpu had performed the load or store.
*/
_GLOBAL(cvt_fd)
- lfd 0,THREAD_FPSCR(r5) /* load up fpscr value */
- MTFSF_L(0)
lfs 0,0(r3)
stfd 0,0(r4)
- mffs 0
- stfd 0,THREAD_FPSCR(r5) /* save new fpscr value */
blr
_GLOBAL(cvt_df)
- lfd 0,THREAD_FPSCR(r5) /* load up fpscr value */
- MTFSF_L(0)
lfd 0,0(r3)
stfs 0,0(r4)
- mffs 0
- stfd 0,THREAD_FPSCR(r5) /* save new fpscr value */
blr
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