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| author | John David Anglin <dave.anglin@bell.net> | 2013-02-02 23:41:24 +0000 |
|---|---|---|
| committer | Helge Deller <deller@gmx.de> | 2013-02-20 22:50:38 +0100 |
| commit | 027f27c4eca00b4411fb1fe61c33060569ff73f6 (patch) | |
| tree | e77e9bfb6a9a6ce40feb22937390c40987eea0bd /arch/parisc/include/asm/cacheflush.h | |
| parent | b54cb2332e387f29c65f19f3620e5c812c89a328 (diff) | |
| download | talos-op-linux-027f27c4eca00b4411fb1fe61c33060569ff73f6.tar.gz talos-op-linux-027f27c4eca00b4411fb1fe61c33060569ff73f6.zip | |
parisc: disable preemption while flushing D- or I-caches through TMPALIAS region
It is necessary to disable preemption during cache flushes done through the
TMPALIAS region to ensure that the TLB setup is not clobbered by another flush.
Signed-off-by: John David Anglin <dave.anglin@bell.net>
Signed-off-by: Helge Deller <deller@gmx.de>
Diffstat (limited to 'arch/parisc/include/asm/cacheflush.h')
| -rw-r--r-- | arch/parisc/include/asm/cacheflush.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/parisc/include/asm/cacheflush.h b/arch/parisc/include/asm/cacheflush.h index 9f21ab0c02e3..79f694f3ad9b 100644 --- a/arch/parisc/include/asm/cacheflush.h +++ b/arch/parisc/include/asm/cacheflush.h @@ -115,7 +115,9 @@ flush_anon_page(struct vm_area_struct *vma, struct page *page, unsigned long vma { if (PageAnon(page)) { flush_tlb_page(vma, vmaddr); + preempt_disable(); flush_dcache_page_asm(page_to_phys(page), vmaddr); + preempt_enable(); } } |
