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| author | Ingo Molnar <mingo@elte.hu> | 2009-09-02 08:17:56 +0200 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2009-09-02 08:17:56 +0200 |
| commit | 936e894a976dd3b0f07f1f6f43c17b77b7e6146d (patch) | |
| tree | 5ed5c1f6735dcd26550594df23c8f7fe2aa21a15 /arch/mips/pci/pcie-octeon.c | |
| parent | 69575d388603365f2afbf4166df93152df59b165 (diff) | |
| parent | 326ba5010a5429a5a528b268b36a5900d4ab0eba (diff) | |
| download | talos-op-linux-936e894a976dd3b0f07f1f6f43c17b77b7e6146d.tar.gz talos-op-linux-936e894a976dd3b0f07f1f6f43c17b77b7e6146d.zip | |
Merge commit 'v2.6.31-rc8' into x86/txt
Conflicts:
arch/x86/kernel/reboot.c
security/Kconfig
Merge reason: resolve the conflicts, bump up from rc3 to rc8.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/mips/pci/pcie-octeon.c')
| -rw-r--r-- | arch/mips/pci/pcie-octeon.c | 31 |
1 files changed, 17 insertions, 14 deletions
diff --git a/arch/mips/pci/pcie-octeon.c b/arch/mips/pci/pcie-octeon.c index 75262247f3e4..6aa5c542d52d 100644 --- a/arch/mips/pci/pcie-octeon.c +++ b/arch/mips/pci/pcie-octeon.c @@ -1040,19 +1040,29 @@ static inline int octeon_pcie_read_config(int pcie_port, struct pci_bus *bus, int bus_number = bus->number; /* - * We need to force the bus number to be zero on the root - * bus. Linux numbers the 2nd root bus to start after all - * buses on root 0. + * For the top level bus make sure our hardware bus number + * matches the software one. */ - if (bus->parent == NULL) - bus_number = 0; + if (bus->parent == NULL) { + union cvmx_pciercx_cfg006 pciercx_cfg006; + pciercx_cfg006.u32 = cvmx_pcie_cfgx_read(pcie_port, + CVMX_PCIERCX_CFG006(pcie_port)); + if (pciercx_cfg006.s.pbnum != bus_number) { + pciercx_cfg006.s.pbnum = bus_number; + pciercx_cfg006.s.sbnum = bus_number; + pciercx_cfg006.s.subbnum = bus_number; + cvmx_pcie_cfgx_write(pcie_port, + CVMX_PCIERCX_CFG006(pcie_port), + pciercx_cfg006.u32); + } + } /* * PCIe only has a single device connected to Octeon. It is * always device ID 0. Don't bother doing reads for other * device IDs on the first segment. */ - if ((bus_number == 0) && (devfn >> 3 != 0)) + if ((bus->parent == NULL) && (devfn >> 3 != 0)) return PCIBIOS_FUNC_NOT_SUPPORTED; /* @@ -1070,7 +1080,7 @@ static inline int octeon_pcie_read_config(int pcie_port, struct pci_bus *bus, * bridge only respondes to device ID 0, function * 0-1 */ - if ((bus_number == 0) && (devfn >= 2)) + if ((bus->parent == NULL) && (devfn >= 2)) return PCIBIOS_FUNC_NOT_SUPPORTED; /* * The PCI-X slots are device ID 2,3. Choose one of @@ -1167,13 +1177,6 @@ static inline int octeon_pcie_write_config(int pcie_port, struct pci_bus *bus, int size, u32 val) { int bus_number = bus->number; - /* - * We need to force the bus number to be zero on the root - * bus. Linux numbers the 2nd root bus to start after all - * busses on root 0. - */ - if (bus->parent == NULL) - bus_number = 0; switch (size) { case 4: |
