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author | Maciej W. Rozycki <macro@linux-mips.org> | 2013-09-17 16:58:10 +0100 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2013-09-18 20:25:19 +0200 |
commit | 8ff374b9c296b96484d5e63b45b22d0862ffee8f (patch) | |
tree | 0a40c8b881b985854a58793b14ca7b4de9c6f123 /arch/mips/netlogic | |
parent | b42b4f3af8b1ac2f7b09781d523bf918f366d8d6 (diff) | |
download | talos-op-linux-8ff374b9c296b96484d5e63b45b22d0862ffee8f.tar.gz talos-op-linux-8ff374b9c296b96484d5e63b45b22d0862ffee8f.zip |
MIPS: Cleanup CP0 PRId and CP1 FPIR register access masks
Replace hardcoded CP0 PRId and CP1 FPIR register access masks throughout.
The change does not touch places that use shifted or partial masks.
Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5838/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/netlogic')
-rw-r--r-- | arch/mips/netlogic/xlr/fmn-config.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/mips/netlogic/xlr/fmn-config.c b/arch/mips/netlogic/xlr/fmn-config.c index ed3bf0e3f309..c7622c6e5f67 100644 --- a/arch/mips/netlogic/xlr/fmn-config.c +++ b/arch/mips/netlogic/xlr/fmn-config.c @@ -36,6 +36,7 @@ #include <linux/irq.h> #include <linux/interrupt.h> +#include <asm/cpu.h> #include <asm/mipsregs.h> #include <asm/netlogic/xlr/fmn.h> #include <asm/netlogic/xlr/xlr.h> @@ -187,7 +188,7 @@ void xlr_board_info_setup(void) int processor_id, num_core; num_core = hweight32(nlm_current_node()->coremask); - processor_id = read_c0_prid() & 0xff00; + processor_id = read_c0_prid() & PRID_IMP_MASK; setup_cpu_fmninfo(cpu, num_core); switch (processor_id) { |