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| author | Tejun Heo <tj@kernel.org> | 2011-05-24 09:59:36 +0200 |
|---|---|---|
| committer | Tejun Heo <tj@kernel.org> | 2011-05-24 09:59:36 +0200 |
| commit | 6988f20fe04e9ef3aea488cb8ab57fbeb78e12f0 (patch) | |
| tree | c9d7fc50a2e2147a5ca07e3096e7eeb916ad2da9 /arch/mips/mti-malta/malta-smtc.c | |
| parent | 0415b00d175e0d8945e6785aad21b5f157976ce0 (diff) | |
| parent | 6ea0c34dac89611126455537552cffe6c7e832ad (diff) | |
| download | talos-op-linux-6988f20fe04e9ef3aea488cb8ab57fbeb78e12f0.tar.gz talos-op-linux-6988f20fe04e9ef3aea488cb8ab57fbeb78e12f0.zip | |
Merge branch 'fixes-2.6.39' into for-2.6.40
Diffstat (limited to 'arch/mips/mti-malta/malta-smtc.c')
| -rw-r--r-- | arch/mips/mti-malta/malta-smtc.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/mips/mti-malta/malta-smtc.c b/arch/mips/mti-malta/malta-smtc.c index 192cfd2a539c..e67891521ac1 100644 --- a/arch/mips/mti-malta/malta-smtc.c +++ b/arch/mips/mti-malta/malta-smtc.c @@ -34,7 +34,6 @@ static void msmtc_send_ipi_mask(const struct cpumask *mask, unsigned int action) */ static void __cpuinit msmtc_init_secondary(void) { - void smtc_init_secondary(void); int myvpe; /* Don't enable Malta I/O interrupts (IP2) for secondary VPEs */ @@ -114,7 +113,8 @@ struct plat_smp_ops msmtc_smp_ops = { */ -int plat_set_irq_affinity(unsigned int irq, const struct cpumask *affinity) +int plat_set_irq_affinity(struct irq_data *d, const struct cpumask *affinity, + bool force) { cpumask_t tmask; int cpu = 0; @@ -144,7 +144,7 @@ int plat_set_irq_affinity(unsigned int irq, const struct cpumask *affinity) if ((cpu_data[cpu].vpe_id != 0) || !cpu_online(cpu)) cpu_clear(cpu, tmask); } - cpumask_copy(irq_desc[irq].affinity, &tmask); + cpumask_copy(d->affinity, &tmask); if (cpus_empty(tmask)) /* @@ -155,8 +155,8 @@ int plat_set_irq_affinity(unsigned int irq, const struct cpumask *affinity) "IRQ affinity leaves no legal CPU for IRQ %d\n", irq); /* Do any generic SMTC IRQ affinity setup */ - smtc_set_irq_affinity(irq, tmask); + smtc_set_irq_affinity(d->irq, tmask); - return 0; + return IRQ_SET_MASK_OK_NOCOPY; } #endif /* CONFIG_MIPS_MT_SMTC_IRQAFF */ |
