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authorYoichi Yuasa <yuasa@linux-mips.org>2012-08-01 15:42:16 +0900
committerRalf Baechle <ralf@linux-mips.org>2012-08-01 17:59:23 +0200
commit4b00951f6f2fd335f063e553b474fe4648b3307d (patch)
tree7742f40b0bf7195cb7505895305cbbf37b96b2f6 /arch/mips/include
parent47cd7343f5467bf38d17a78eb99eaa8019e17007 (diff)
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MIPS: Loongson 1: more clk support and add select HAVE_CLK
This fixes a redefinition of clk_*: arch/mips/loongson1/common/clock.c:23:13: error: redefinition of 'clk_get' include/linux/clk.h:281:27: note: previous definition of 'clk_get' was here arch/mips/loongson1/common/clock.c:41:15: error: redefinition of 'clk_get_rate' include/linux/clk.h:302:29: note: previous definition of 'clk_get_rate' was here make[3]: *** [arch/mips/loongson1/common/clock.o] Error 1 Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org> Cc: linux-mips@linux-mips.org Reviewed-by: John Crispin <blogic@openwrt.org> Acked-by: Kelvin Cheung <keguang.zhang@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/4143/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include')
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