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| author | Steven J. Hill <Steven.Hill@imgtec.com> | 2013-03-25 13:22:59 -0500 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2013-05-09 17:55:19 +0200 |
| commit | 1658f914ff91c3bf572d5ddae3773720f6803d20 (patch) | |
| tree | 6a7e13a9ac7d7d978e41eb7a8e47b769b4f44290 /arch/mips/include/asm/mach-sead3/cpu-feature-overrides.h | |
| parent | 01be057b33f52f094bff3a79a93d9ca99e27483d (diff) | |
| download | talos-op-linux-1658f914ff91c3bf572d5ddae3773720f6803d20.tar.gz talos-op-linux-1658f914ff91c3bf572d5ddae3773720f6803d20.zip | |
MIPS: microMIPS: Disable LL/SC and fix linker bug.
Partially revert commit e0c14a260d66ba35935600d6435940a566fe806b
and turn off LL/SC when building a pure microMIPS kernel. This is
a temporary fix until the cmpxchg assembly macro functions are
re-written to not use the HI/LO registers in address calculations.
Also add .insn in selected user access functions which would
otherwise produce ISA mode jump incompatibilities. This is also a
temporary fix.
Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
Diffstat (limited to 'arch/mips/include/asm/mach-sead3/cpu-feature-overrides.h')
| -rw-r--r-- | arch/mips/include/asm/mach-sead3/cpu-feature-overrides.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/mips/include/asm/mach-sead3/cpu-feature-overrides.h b/arch/mips/include/asm/mach-sead3/cpu-feature-overrides.h index 193c0912d38e..bfbd7035d4c5 100644 --- a/arch/mips/include/asm/mach-sead3/cpu-feature-overrides.h +++ b/arch/mips/include/asm/mach-sead3/cpu-feature-overrides.h @@ -28,7 +28,11 @@ /* #define cpu_has_prefetch ? */ #define cpu_has_mcheck 1 /* #define cpu_has_ejtag ? */ +#ifdef CONFIG_CPU_MICROMIPS +#define cpu_has_llsc 0 +#else #define cpu_has_llsc 1 +#endif /* #define cpu_has_vtag_icache ? */ /* #define cpu_has_dc_aliases ? */ /* #define cpu_has_ic_fills_f_dc ? */ |
