Merge tag 'exynos-dt-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/dt

From Kukjin Kim:
Update exynos DT for
- usb3phy and dwc3 for exynos5250
- keypad for exynos4412
- TMU clock for exynos4210
- MFC clock for exynos4
- DP controller for exynos5250
- G2D clock for exynos4
- some exynos boards

* tag 'exynos-dt-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: (456 commits)
  ARM: dts: add ohci and ehci controller nodes for EXYNOS5440
  ARM: dts: Update G2D documentation for clock entries
  ARM: dts: Add clock entries to G2D node for exynos4x12
  ARM: dts: Add clock entries to G2D node for exynos4210
  ARM: dts: Remove duplicate and add missing G2D nodes
  clk: exynos4: Add additional G2D clocks
  ARM: dts: Document DP clock in samsung,exynos5-dp binding
  ARM: dts: add pin state information for DP HPD support to Exynos5250
  ARM: dts: add dts node for the ahci sata exynos5440
  ARM: dts: add vmmc regulator support for ODROID-X
  ARM: dts: add max77686 node entry for ODROID-X
  ARM: dts: Enable RTC by default on EXYNOS5440
  ARM: dts: Add display timing node to exynos5250-arndale.dts
  ARM: dts: Add clock provider information for DP controller in Exynos5250 SoC
  ARM: dts: Add DT node for DP controller for Arndale Board
  ARM: dts: Remove combiner IRQ node from exynos4x12.dtsi
  ARM: dts: add max8997 device node for exynos4210-origen board
  ARM: dts: Enable TMU on Origen4210 board
  ARM: dts: Add TMU clock entries to exynos4210.dtsi
  ARM: dts: Update MFC documentation for clock entries
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>

1 files changed, 3 insertions, 3 deletions

diff --git a/arch/microblaze/include/asm/io.h b/arch/microblaze/include/asm/io.h
index 8cb8a8566ede..2565cb94f32f 100644
--- a/arch/microblaze/include/asm/io.h
+++ b/arch/microblaze/include/asm/io.h
@@ -123,11 +123,11 @@ static inline void writel(unsigned int v, volatile void __iomem *addr)
  * inb_p/inw_p/...
  * The macros don't do byte-swapping.
  */
-#define inb(port)		readb((u8 *)((port)))
+#define inb(port)		readb((u8 *)((unsigned long)(port)))
 #define outb(val, port)		writeb((val), (u8 *)((unsigned long)(port)))
-#define inw(port)		readw((u16 *)((port)))
+#define inw(port)		readw((u16 *)((unsigned long)(port)))
 #define outw(val, port)		writew((val), (u16 *)((unsigned long)(port)))
-#define inl(port)		readl((u32 *)((port)))
+#define inl(port)		readl((u32 *)((unsigned long)(port)))
 #define outl(val, port)		writel((val), (u32 *)((unsigned long)(port)))
 
 #define inb_p(port)		inb((port))