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authorGreg Ungerer <gerg@uclinux.org>2009-05-19 14:52:40 +1000
committerGreg Ungerer <gerg@uclinux.org>2009-09-16 09:43:51 +1000
commit04b75b10dceadf937e3707ecc3dfccf6a076fd29 (patch)
tree87965d12b8f7eb622efd1d36bebd2a7b8a26452e /arch/m68k/include/asm/m5307sim.h
parentf9311f26434cea3e926f56ca2aa3e5740e962c72 (diff)
downloadtalos-op-linux-04b75b10dceadf937e3707ecc3dfccf6a076fd29.tar.gz
talos-op-linux-04b75b10dceadf937e3707ecc3dfccf6a076fd29.zip
m68knommu: simplify ColdFire "timers" clock initialization
The ColdFire "timers" clock setup can be simplified. There is really no need for the flexible per-platform setup code. The clock interrupt can be hard defined per CPU platform (in CPU include files). This makes the actual timer code simpler. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68k/include/asm/m5307sim.h')
-rw-r--r--arch/m68k/include/asm/m5307sim.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/m68k/include/asm/m5307sim.h b/arch/m68k/include/asm/m5307sim.h
index 60946225699d..c6830e5b54ce 100644
--- a/arch/m68k/include/asm/m5307sim.h
+++ b/arch/m68k/include/asm/m5307sim.h
@@ -124,6 +124,7 @@
#define MCFSIM_DMA2ICR MCFSIM_ICR8 /* DMA 2 ICR */
#define MCFSIM_DMA3ICR MCFSIM_ICR9 /* DMA 3 ICR */
+
/*
* Some symbol defines for the Parallel Port Pin Assignment Register
*/
@@ -139,6 +140,11 @@
#define IRQ3_LEVEL6 0x40
#define IRQ1_LEVEL2 0x20
+/*
+ * Define system peripheral IRQ usage.
+ */
+#define MCF_IRQ_TIMER 30 /* Timer0, Level 6 */
+#define MCF_IRQ_PROFILER 31 /* Timer1, Level 7 */
/*
* Define the Cache register flags.
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