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| author | Juergen Gross <jgross@suse.com> | 2014-11-03 14:01:59 +0100 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2014-11-16 11:04:26 +0100 |
| commit | e00c8cc93c1ac01ecd5049929a50fb47b62bb041 (patch) | |
| tree | a3833abca982fc685332340bb604dc925eb91c24 /arch/ia64/include/asm/fpswa.h | |
| parent | b14097bd911c2554b0b5271b3a6b2d84044d1843 (diff) | |
| download | talos-op-linux-e00c8cc93c1ac01ecd5049929a50fb47b62bb041.tar.gz talos-op-linux-e00c8cc93c1ac01ecd5049929a50fb47b62bb041.zip | |
x86: Use new cache mode type in memtype related functions
Instead of directly using the cache mode bits in the pte switch to
using the cache mode type.
Based-on-patch-by: Stefan Bader <stefan.bader@canonical.com>
Signed-off-by: Juergen Gross <jgross@suse.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Cc: stefan.bader@canonical.com
Cc: xen-devel@lists.xensource.com
Cc: konrad.wilk@oracle.com
Cc: ville.syrjala@linux.intel.com
Cc: david.vrabel@citrix.com
Cc: jbeulich@suse.com
Cc: toshi.kani@hp.com
Cc: plagnioj@jcrosoft.com
Cc: tomi.valkeinen@ti.com
Cc: bhelgaas@google.com
Link: http://lkml.kernel.org/r/1415019724-4317-14-git-send-email-jgross@suse.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/ia64/include/asm/fpswa.h')
0 files changed, 0 insertions, 0 deletions
