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| author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2008-10-07 19:08:56 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-10-07 19:08:56 +0100 |
| commit | 5a89770daad83df74d77a8d34a1ffaedae565ce9 (patch) | |
| tree | 0d8ef70293a6ef969ba8b7718e59608337643d40 /arch/blackfin/mach-bf561/include/mach/dma.h | |
| parent | c46c948260f41af18b277c1eb1895d788d3605dc (diff) | |
| parent | af7c951d76708c61b862463d579d76be757130bf (diff) | |
| download | talos-op-linux-5a89770daad83df74d77a8d34a1ffaedae565ce9.tar.gz talos-op-linux-5a89770daad83df74d77a8d34a1ffaedae565ce9.zip | |
Merge branches 'pxa-core' and 'pxa-machines' into pxa-all
Conflicts:
arch/arm/mach-pxa/Kconfig
arch/arm/mach-pxa/pxa25x.c
arch/arm/mach-pxa/pxa27x.c
Diffstat (limited to 'arch/blackfin/mach-bf561/include/mach/dma.h')
| -rw-r--r-- | arch/blackfin/mach-bf561/include/mach/dma.h | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/arch/blackfin/mach-bf561/include/mach/dma.h b/arch/blackfin/mach-bf561/include/mach/dma.h new file mode 100644 index 000000000000..8bc46cd89a02 --- /dev/null +++ b/arch/blackfin/mach-bf561/include/mach/dma.h @@ -0,0 +1,35 @@ +/***************************************************************************** +* +* BF-533/2/1 Specific Declarations +* +****************************************************************************/ + +#ifndef _MACH_DMA_H_ +#define _MACH_DMA_H_ + +#define MAX_BLACKFIN_DMA_CHANNEL 36 + +#define CH_PPI0 0 +#define CH_PPI (CH_PPI0) +#define CH_PPI1 1 +#define CH_SPORT0_RX 12 +#define CH_SPORT0_TX 13 +#define CH_SPORT1_RX 14 +#define CH_SPORT1_TX 15 +#define CH_SPI 16 +#define CH_UART_RX 17 +#define CH_UART_TX 18 +#define CH_MEM_STREAM0_DEST 24 /* TX */ +#define CH_MEM_STREAM0_SRC 25 /* RX */ +#define CH_MEM_STREAM1_DEST 26 /* TX */ +#define CH_MEM_STREAM1_SRC 27 /* RX */ +#define CH_MEM_STREAM2_DEST 28 +#define CH_MEM_STREAM2_SRC 29 +#define CH_MEM_STREAM3_DEST 30 +#define CH_MEM_STREAM3_SRC 31 +#define CH_IMEM_STREAM0_DEST 32 +#define CH_IMEM_STREAM0_SRC 33 +#define CH_IMEM_STREAM1_DEST 34 +#define CH_IMEM_STREAM1_SRC 35 + +#endif |
