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author | Simon Horman <horms+renesas@verge.net.au> | 2013-06-26 17:34:34 +0900 |
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committer | Simon Horman <horms+renesas@verge.net.au> | 2013-07-17 14:24:40 +0900 |
commit | a4b91be0b607ffecf6cf9dacdefcaa0797340e3c (patch) | |
tree | cf258f5a7b762bbc6b99053ae2dfad13744f10e9 /arch/arm | |
parent | 66a5cab04d339d02b93a4671eadf8e251dbfdc2c (diff) | |
download | talos-op-linux-a4b91be0b607ffecf6cf9dacdefcaa0797340e3c.tar.gz talos-op-linux-a4b91be0b607ffecf6cf9dacdefcaa0797340e3c.zip |
ARM: shmobile: r8a7790: add clocks for thermal
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/mach-shmobile/clock-r8a7790.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c index 5d71313df52d..28eccd114ca7 100644 --- a/arch/arm/mach-shmobile/clock-r8a7790.c +++ b/arch/arm/mach-shmobile/clock-r8a7790.c @@ -49,6 +49,7 @@ #define SMSTPCR2 0xe6150138 #define SMSTPCR3 0xe615013c +#define SMSTPCR5 0xe6150144 #define SMSTPCR7 0xe615014c #define MODEMR 0xE6160060 @@ -182,6 +183,7 @@ static struct clk div6_clks[DIV6_NR] = { enum { MSTP721, MSTP720, MSTP717, MSTP716, + MSTP522, MSTP315, MSTP314, MSTP313, MSTP312, MSTP311, MSTP305, MSTP304, MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP_NR @@ -203,6 +205,7 @@ static struct clk mstp_clks[MSTP_NR] = { [MSTP204] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 4, 0), /* SCIFA0 */ [MSTP203] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 3, 0), /* SCIFA1 */ [MSTP202] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 2, 0), /* SCIFA2 */ + [MSTP522] = SH_CLK_MSTP32(&extal_clk, SMSTPCR5, 22, 0), /* Thermal */ [MSTP717] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 17, 0), /* HSCIF0 */ [MSTP716] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 16, 0), /* HSCIF1 */ }; @@ -254,6 +257,7 @@ static struct clk_lookup lookups[] = { CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP720]), CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP717]), CLKDEV_DEV_ID("sh-sci.9", &mstp_clks[MSTP716]), + CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]), CLKDEV_DEV_ID("ee200000.mmcif", &mstp_clks[MSTP315]), CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP315]), CLKDEV_DEV_ID("ee100000.sdhi", &mstp_clks[MSTP314]), |