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| author | Will Deacon <will.deacon@arm.com> | 2015-10-06 18:46:22 +0100 |
|---|---|---|
| committer | Catalin Marinas <catalin.marinas@arm.com> | 2015-10-07 11:44:25 +0100 |
| commit | fa7aae8a4257e6be7051420dac1f150c1eef721b (patch) | |
| tree | 03d989f98b6c96806631b4ac02b09014a36dba93 /arch/arm64/mm | |
| parent | c51e97d89e526368eb697f87cd4d391b9e19f369 (diff) | |
| download | talos-op-linux-fa7aae8a4257e6be7051420dac1f150c1eef721b.tar.gz talos-op-linux-fa7aae8a4257e6be7051420dac1f150c1eef721b.zip | |
arm64: proc: de-scope TLBI operation during cold boot
When cold-booting a CPU, we must invalidate any junk entries from the
local TLB prior to enabling the MMU. This doesn't require broadcasting
within the inner-shareable domain, so de-scope the operation to apply
only to the local CPU.
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/mm')
| -rw-r--r-- | arch/arm64/mm/proc.S | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S index e4ee7bd8830a..bbde13d77da5 100644 --- a/arch/arm64/mm/proc.S +++ b/arch/arm64/mm/proc.S @@ -146,8 +146,8 @@ ENDPROC(cpu_do_switch_mm) * value of the SCTLR_EL1 register. */ ENTRY(__cpu_setup) - tlbi vmalle1is // invalidate I + D TLBs - dsb ish + tlbi vmalle1 // Invalidate local TLB + dsb nsh mov x0, #3 << 20 msr cpacr_el1, x0 // Enable FP/ASIMD |
