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authorUwe Kleine-König <u.kleine-koenig@pengutronix.de>2010-10-25 15:44:25 +0200
committerUwe Kleine-König <u.kleine-koenig@pengutronix.de>2010-11-17 08:58:11 +0100
commita99631489bbd1b4647b82d0822b6a3942e2dd731 (patch)
tree9af7ee56eea709ae48587ca5409e768fbf68917a /arch/arm/plat-mxc/include/mach/mx27.h
parentcf3a6aba2f8402d4e45f7f263a0e69f779cd1bdc (diff)
downloadtalos-op-linux-a99631489bbd1b4647b82d0822b6a3942e2dd731.tar.gz
talos-op-linux-a99631489bbd1b4647b82d0822b6a3942e2dd731.zip
ARM: imx: change static io mapping to use a function
Now only the virtual addresses [0xf4000000, 0xf5ffffff] are used for static per-SoC mappings. The few mappings of whole chip selects are moved accordingly. The now wrong defines for virtual base addresses are removed. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Diffstat (limited to 'arch/arm/plat-mxc/include/mach/mx27.h')
-rw-r--r--arch/arm/plat-mxc/include/mach/mx27.h9
1 files changed, 1 insertions, 8 deletions
diff --git a/arch/arm/plat-mxc/include/mach/mx27.h b/arch/arm/plat-mxc/include/mach/mx27.h
index c769cc8c0e86..e81728921686 100644
--- a/arch/arm/plat-mxc/include/mach/mx27.h
+++ b/arch/arm/plat-mxc/include/mach/mx27.h
@@ -29,7 +29,6 @@
#endif
#define MX27_AIPI_BASE_ADDR 0x10000000
-#define MX27_AIPI_BASE_ADDR_VIRT 0xf4000000
#define MX27_AIPI_SIZE SZ_1M
#define MX27_DMA_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x01000)
#define MX27_WDOG_BASE_ADDR (MX27_AIPI_BASE_ADDR + 0x02000)
@@ -87,7 +86,6 @@
#define MX27_ROMP_BASE_ADDR 0x10041000
#define MX27_SAHB1_BASE_ADDR 0x80000000
-#define MX27_SAHB1_BASE_ADDR_VIRT 0xf4100000
#define MX27_SAHB1_SIZE SZ_1M
#define MX27_CSI_BASE_ADDR (MX27_SAHB1_BASE_ADDR + 0x0000)
#define MX27_ATA_BASE_ADDR (MX27_SAHB1_BASE_ADDR + 0x1000)
@@ -105,7 +103,6 @@
/* NAND, SDRAM, WEIM, M3IF, EMI controllers */
#define MX27_X_MEMC_BASE_ADDR 0xd8000000
-#define MX27_X_MEMC_BASE_ADDR_VIRT 0xf4200000
#define MX27_X_MEMC_SIZE SZ_1M
#define MX27_NFC_BASE_ADDR (MX27_X_MEMC_BASE_ADDR)
#define MX27_SDRAMC_BASE_ADDR (MX27_X_MEMC_BASE_ADDR + 0x1000)
@@ -123,10 +120,7 @@
/* IRAM */
#define MX27_IRAM_BASE_ADDR 0xffff4c00 /* internal ram */
-#define MX27_IO_P2V(x) ( \
- IMX_IO_P2V_MODULE(x, MX27_AIPI) ?: \
- IMX_IO_P2V_MODULE(x, MX27_SAHB1) ?: \
- IMX_IO_P2V_MODULE(x, MX27_X_MEMC))
+#define MX27_IO_P2V(x) IMX_IO_P2V(x)
#define MX27_IO_ADDRESS(x) IOMEM(MX27_IO_P2V(x))
#ifndef __ASSEMBLER__
@@ -280,7 +274,6 @@ extern int mx27_revision(void);
#define CS4_BASE_ADDR MX27_CS4_BASE_ADDR
#define CS5_BASE_ADDR MX27_CS5_BASE_ADDR
#define X_MEMC_BASE_ADDR MX27_X_MEMC_BASE_ADDR
-#define X_MEMC_BASE_ADDR_VIRT MX27_X_MEMC_BASE_ADDR_VIRT
#define X_MEMC_SIZE MX27_X_MEMC_SIZE
#define NFC_BASE_ADDR MX27_NFC_BASE_ADDR
#define SDRAMC_BASE_ADDR MX27_SDRAMC_BASE_ADDR
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