Merge tag 'tegra-soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/olof/tegra into tegra/soc2

From: Olof Johansson <olof@lixom.net>
Tegra 30 SMP support

I did this as a separate topic branch because it depends on both the
soc and the soc-drivers branch, so it brings both of those in as a base.

This branch contains work to enable SMP support on Tegra30 and reworks
some of the SMP bringup for T20 as well.

It also contains a device tree patch that builds on top of the SMP/clock
changes in the rest of the branch, so it made more sense to apply it
here than deal with the merge conflicts back and forth.

* tag 'tegra-soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/olof/tegra:
  ARM: dt: Explicitly configure all serial ports on Tegra Cardhu
  ARM: tegra: support for secondary cores on Tegra30
  ARM: tegra: support for Tegra30 CPU powerdomains
  ARM: tegra: add support for Tegra30 powerdomains
  ARM: tegra: export tegra_powergate_is_powered()
  ARM: tegra: prepare powergate.c for multiple variants
  ARM: tegra: rework Tegra secondary CPU core bringup
  ARM: tegra: functions to access the flowcontroller
  ARM: tegra: initialize Tegra chipid early
  ARM: tegra: export Tegra chipid
  ARM: tegra: cleanup use of chipid register

Signed-off-by: Arnd Bergmann <arnd@arndb.de>

1 files changed, 25 insertions, 0 deletions

diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c
index a2eb90169aed..09dc37fc4299 100644
--- a/arch/arm/mach-tegra/common.c
+++ b/arch/arm/mach-tegra/common.c
@@ -28,10 +28,29 @@
 
 #include <mach/iomap.h>
 #include <mach/system.h>
+#include <mach/powergate.h>
 
 #include "board.h"
 #include "clock.h"
 #include "fuse.h"
+#include "pmc.h"
+
+/*
+ * Storage for debug-macro.S's state.
+ *
+ * This must be in .data not .bss so that it gets initialized each time the
+ * kernel is loaded. The data is declared here rather than debug-macro.S so
+ * that multiple inclusions of debug-macro.S point at the same data.
+ */
+#define TEGRA_DEBUG_UART_OFFSET (TEGRA_DEBUG_UART_BASE & 0xFFFF)
+u32 tegra_uart_config[3] = {
+	/* Debug UART initialization required */
+	1,
+	/* Debug UART physical address */
+	(u32)(IO_APB_PHYS + TEGRA_DEBUG_UART_OFFSET),
+	/* Debug UART virtual address */
+	(u32)(IO_APB_VIRT + TEGRA_DEBUG_UART_OFFSET),
+};
 
 #ifdef CONFIG_OF
 static const struct of_device_id tegra_dt_irq_match[] __initconst = {
@@ -100,11 +119,17 @@ void __init tegra20_init_early(void)
 	tegra2_init_clocks();
 	tegra_clk_init_from_table(tegra20_clk_init_table);
 	tegra_init_cache(0x331, 0x441);
+	tegra_pmc_init();
+	tegra_powergate_init();
 }
 #endif
 #ifdef CONFIG_ARCH_TEGRA_3x_SOC
 void __init tegra30_init_early(void)
 {
+	tegra_init_fuse();
+	tegra30_init_clocks();
 	tegra_init_cache(0x441, 0x551);
+	tegra_pmc_init();
+	tegra_powergate_init();
 }
 #endif