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authorShiraz Hashim <shiraz.hashim@st.com>2011-03-07 05:57:08 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2011-03-09 09:50:04 +0000
commit981a95d37126cdf09e1dba3884305c2e25375bfb (patch)
tree280cad24a89b16dd91b392b50a6f7c141183c243 /arch/arm/mach-spear3xx/include/mach/spear300.h
parent8fc4ef451eebc72d10c6987b59ec3316da62f02b (diff)
downloadtalos-op-linux-981a95d37126cdf09e1dba3884305c2e25375bfb.tar.gz
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ARM: 6794/1: SPEAr: Append UL to device address macros.
Reviewed-by: Stanley Miao <stanley.miao@windriver.com> Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com> Signed-off-by: Rajeev Kumar <rajeev-dlh.kumar@st.com> Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-spear3xx/include/mach/spear300.h')
-rw-r--r--arch/arm/mach-spear3xx/include/mach/spear300.h30
1 files changed, 15 insertions, 15 deletions
diff --git a/arch/arm/mach-spear3xx/include/mach/spear300.h b/arch/arm/mach-spear3xx/include/mach/spear300.h
index 8f96cc569591..c723515f8853 100644
--- a/arch/arm/mach-spear3xx/include/mach/spear300.h
+++ b/arch/arm/mach-spear3xx/include/mach/spear300.h
@@ -17,7 +17,7 @@
#define __MACH_SPEAR300_H
/* Base address of various IPs */
-#define SPEAR300_TELECOM_BASE 0x50000000
+#define SPEAR300_TELECOM_BASE UL(0x50000000)
/* Interrupt registers offsets and masks */
#define INT_ENB_MASK_REG 0x54
@@ -34,20 +34,20 @@
#define SHIRQ_RAS1_MASK 0x1FF
-#define SPEAR300_CLCD_BASE 0x60000000
-#define SPEAR300_SDHCI_BASE 0x70000000
-#define SPEAR300_NAND_0_BASE 0x80000000
-#define SPEAR300_NAND_1_BASE 0x84000000
-#define SPEAR300_NAND_2_BASE 0x88000000
-#define SPEAR300_NAND_3_BASE 0x8c000000
-#define SPEAR300_NOR_0_BASE 0x90000000
-#define SPEAR300_NOR_1_BASE 0x91000000
-#define SPEAR300_NOR_2_BASE 0x92000000
-#define SPEAR300_NOR_3_BASE 0x93000000
-#define SPEAR300_FSMC_BASE 0x94000000
-#define SPEAR300_SOC_CONFIG_BASE 0x99000000
-#define SPEAR300_KEYBOARD_BASE 0xA0000000
-#define SPEAR300_GPIO_BASE 0xA9000000
+#define SPEAR300_CLCD_BASE UL(0x60000000)
+#define SPEAR300_SDHCI_BASE UL(0x70000000)
+#define SPEAR300_NAND_0_BASE UL(0x80000000)
+#define SPEAR300_NAND_1_BASE UL(0x84000000)
+#define SPEAR300_NAND_2_BASE UL(0x88000000)
+#define SPEAR300_NAND_3_BASE UL(0x8c000000)
+#define SPEAR300_NOR_0_BASE UL(0x90000000)
+#define SPEAR300_NOR_1_BASE UL(0x91000000)
+#define SPEAR300_NOR_2_BASE UL(0x92000000)
+#define SPEAR300_NOR_3_BASE UL(0x93000000)
+#define SPEAR300_FSMC_BASE UL(0x94000000)
+#define SPEAR300_SOC_CONFIG_BASE UL(0x99000000)
+#define SPEAR300_KEYBOARD_BASE UL(0xA0000000)
+#define SPEAR300_GPIO_BASE UL(0xA9000000)
#endif /* __MACH_SPEAR300_H */
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