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| author | Eric Anholt <eric@anholt.net> | 2010-05-07 14:30:03 -0700 |
|---|---|---|
| committer | Eric Anholt <eric@anholt.net> | 2010-05-10 13:36:52 -0700 |
| commit | 34dc4d4423dc342848d72be764832cbc0852854a (patch) | |
| tree | 056402a4afc2b7ef2f4dee30a712ce847279c13a /arch/arm/mach-omap2/clockdomain.c | |
| parent | 3d8620cc5f8538364ee152811e2bd8713abb1d58 (diff) | |
| parent | 722154e4cacf015161efe60009ae9be23d492296 (diff) | |
| download | talos-op-linux-34dc4d4423dc342848d72be764832cbc0852854a.tar.gz talos-op-linux-34dc4d4423dc342848d72be764832cbc0852854a.zip | |
Merge remote branch 'origin/master' into drm-intel-next
Conflicts:
drivers/gpu/drm/i915/i915_dma.c
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/radeon/r300.c
The BSD ringbuffer support that is landing in this branch
significantly conflicts with the Ironlake PIPE_CONTROL fix on master,
and requires it to be tested successfully anyway.
Diffstat (limited to 'arch/arm/mach-omap2/clockdomain.c')
| -rw-r--r-- | arch/arm/mach-omap2/clockdomain.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c index b87ad66f083e..6e568ec995ee 100644 --- a/arch/arm/mach-omap2/clockdomain.c +++ b/arch/arm/mach-omap2/clockdomain.c @@ -240,7 +240,7 @@ static void _omap2_clkdm_set_hwsup(struct clockdomain *clkdm, int enable) bits = OMAP24XX_CLKSTCTRL_ENABLE_AUTO; else bits = OMAP24XX_CLKSTCTRL_DISABLE_AUTO; - } else if (cpu_is_omap34xx() | cpu_is_omap44xx()) { + } else if (cpu_is_omap34xx() || cpu_is_omap44xx()) { if (enable) bits = OMAP34XX_CLKSTCTRL_ENABLE_AUTO; else @@ -812,7 +812,7 @@ int omap2_clkdm_sleep(struct clockdomain *clkdm) cm_set_mod_reg_bits(OMAP24XX_FORCESTATE, clkdm->pwrdm.ptr->prcm_offs, OMAP2_PM_PWSTCTRL); - } else if (cpu_is_omap34xx() | cpu_is_omap44xx()) { + } else if (cpu_is_omap34xx() || cpu_is_omap44xx()) { u32 bits = (OMAP34XX_CLKSTCTRL_FORCE_SLEEP << __ffs(clkdm->clktrctrl_mask)); @@ -856,7 +856,7 @@ int omap2_clkdm_wakeup(struct clockdomain *clkdm) cm_clear_mod_reg_bits(OMAP24XX_FORCESTATE, clkdm->pwrdm.ptr->prcm_offs, OMAP2_PM_PWSTCTRL); - } else if (cpu_is_omap34xx() | cpu_is_omap44xx()) { + } else if (cpu_is_omap34xx() || cpu_is_omap44xx()) { u32 bits = (OMAP34XX_CLKSTCTRL_FORCE_WAKEUP << __ffs(clkdm->clktrctrl_mask)); |
