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authorTony Lindgren <tony@atomide.com>2005-11-10 14:26:48 +0000
committerRussell King <rmk+kernel@arm.linux.org.uk>2005-11-10 14:26:48 +0000
commit3179a019391f0f8081245fd564a5f1be308ba64f (patch)
treeafdc1200f17b0ca97e04baa7c2cc2d4d2883e0c9 /arch/arm/mach-omap1/irq.c
parenta7918f39bbe59fe76f43743bdb6bb8b0bdefd94a (diff)
downloadtalos-op-linux-3179a019391f0f8081245fd564a5f1be308ba64f.tar.gz
talos-op-linux-3179a019391f0f8081245fd564a5f1be308ba64f.zip
[ARM] 3141/1: OMAP 1/5: Update omap1 specific files
Patch from Tony Lindgren This patch syncs the mainline kernel with linux-omap tree. The highlights of the patch are: - Omap1 serial pport and framebuffer init updates by Imre Deak - Add support for omap310 processor and Palm Tungsten E PDA by Laurent Gonzales, Romain Goyet, et al. Omap310 and omap1510 processors are now handled as omap15xx. - Omap1 specific changes to shared omap clock framework by Tony Lindgren - Omap1 specific changes to shared omap pin mux framework by Tony Lindgren - Other misc fixes, such as update memory timings for smc91x, omap1 specific device initialization etc. Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-omap1/irq.c')
-rw-r--r--arch/arm/mach-omap1/irq.c23
1 files changed, 17 insertions, 6 deletions
diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c
index 192ce6055faa..ed65a7d2e941 100644
--- a/arch/arm/mach-omap1/irq.c
+++ b/arch/arm/mach-omap1/irq.c
@@ -47,6 +47,7 @@
#include <asm/irq.h>
#include <asm/mach/irq.h>
#include <asm/arch/gpio.h>
+#include <asm/arch/cpu.h>
#include <asm/io.h>
@@ -147,11 +148,15 @@ static struct omap_irq_bank omap730_irq_banks[] = {
};
#endif
-#ifdef CONFIG_ARCH_OMAP1510
+#ifdef CONFIG_ARCH_OMAP15XX
static struct omap_irq_bank omap1510_irq_banks[] = {
{ .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3febfff },
{ .base_reg = OMAP_IH2_BASE, .trigger_map = 0xffbfffed },
};
+static struct omap_irq_bank omap310_irq_banks[] = {
+ { .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3faefc3 },
+ { .base_reg = OMAP_IH2_BASE, .trigger_map = 0x65b3c061 },
+};
#endif
#if defined(CONFIG_ARCH_OMAP16XX)
@@ -181,11 +186,15 @@ void __init omap_init_irq(void)
irq_bank_count = ARRAY_SIZE(omap730_irq_banks);
}
#endif
-#ifdef CONFIG_ARCH_OMAP1510
+#ifdef CONFIG_ARCH_OMAP15XX
if (cpu_is_omap1510()) {
irq_banks = omap1510_irq_banks;
irq_bank_count = ARRAY_SIZE(omap1510_irq_banks);
}
+ if (cpu_is_omap310()) {
+ irq_banks = omap310_irq_banks;
+ irq_bank_count = ARRAY_SIZE(omap310_irq_banks);
+ }
#endif
#if defined(CONFIG_ARCH_OMAP16XX)
if (cpu_is_omap16xx()) {
@@ -226,9 +235,11 @@ void __init omap_init_irq(void)
}
/* Unmask level 2 handler */
- if (cpu_is_omap730()) {
+
+ if (cpu_is_omap730())
omap_unmask_irq(INT_730_IH2_IRQ);
- } else {
- omap_unmask_irq(INT_IH2_IRQ);
- }
+ else if (cpu_is_omap1510())
+ omap_unmask_irq(INT_1510_IH2_IRQ);
+ else if (cpu_is_omap16xx())
+ omap_unmask_irq(INT_1610_IH2_IRQ);
}
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