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authorLinus Torvalds <torvalds@linux-foundation.org>2010-09-09 18:31:34 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2010-09-09 18:31:34 -0700
commit152831be91dfe864e06c3b3ff2bf994e04df4cdf (patch)
treeebacd4419074ad8b143b059094f5e2ec347d25fc /arch/arm/mach-mx5
parenta73f8844e1fc54c3762555c1cf1f71774142ca91 (diff)
parenta14d0404088a7b0d51bb5219baf33d77e5592007 (diff)
downloadtalos-op-linux-152831be91dfe864e06c3b3ff2bf994e04df4cdf.tar.gz
talos-op-linux-152831be91dfe864e06c3b3ff2bf994e04df4cdf.zip
Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm: (30 commits) ARM: Update mach-types ARM: Partially revert "Auto calculate ZRELADDR and provide option for exceptions" ARM: Ensure PTE modifications via dma_alloc_coherent are visible ARM: 6359/1: ep93xx: move clock initialization earlier Revert "[ARM] pxa: remove now unnecessary dma_needs_bounce()" ARM: 6352/1: perf: fix event validation ARM: 6344/1: Mark CPU_32v6K as depended on CPU_V7 ARM: 6343/1: wire up fanotify and prlimit64 syscalls on ARM ARM: 6330/1: perf: reword comments relating to perf_event_do_pending ARM: pxa168fb: fix section mismatch ARM: pxa: Make id const in pwm_probe() ARM: pxa: fix CI_HSYNC and CI_VSYNC MFP defines for pxa300 ARM: pxa: remove __init from cpufreq_driver->init() ARM: imx: set cache line size to 64 bytes for i.MX5 mx5/clock: fix clear bit fields issue in _clk_ccgr_disable function mxc/tzic: add base address when accessing TZIC registers ARM: mach-shmobile: ap4evb: fix write protect for SDHI1 ARM: mach-shmobile: ap4evb: modify FSI2 ID ARM: mach-shmobile: do not enable the PLLC2 clock on init ARM: mach-shmobile: Clock framework comment fix ...
Diffstat (limited to 'arch/arm/mach-mx5')
-rw-r--r--arch/arm/mach-mx5/clock-mx51.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-mx5/clock-mx51.c b/arch/arm/mach-mx5/clock-mx51.c
index 6af69def357f..57c10a9926cc 100644
--- a/arch/arm/mach-mx5/clock-mx51.c
+++ b/arch/arm/mach-mx5/clock-mx51.c
@@ -56,7 +56,7 @@ static void _clk_ccgr_disable(struct clk *clk)
{
u32 reg;
reg = __raw_readl(clk->enable_reg);
- reg &= ~(MXC_CCM_CCGRx_MOD_OFF << clk->enable_shift);
+ reg &= ~(MXC_CCM_CCGRx_CG_MASK << clk->enable_shift);
__raw_writel(reg, clk->enable_reg);
}
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