diff options
| author | Jeff Garzik <jgarzik@pobox.com> | 2005-11-11 05:51:24 -0500 |
|---|---|---|
| committer | Jeff Garzik <jgarzik@pobox.com> | 2005-11-11 05:51:24 -0500 |
| commit | 3b621ee5df437d3f332a635ab6421aaa61a7dc2b (patch) | |
| tree | c4a5236cee8eb7418770802313d36a55f1cc0b1e /arch/arm/mach-ixp2000/uengine.c | |
| parent | 7211bb9b64f17b23834d91fc3d0c1d78671ee9a8 (diff) | |
| parent | 5e04e7fe774794b837e1d3897e6b96ae2d06679a (diff) | |
| download | talos-op-linux-3b621ee5df437d3f332a635ab6421aaa61a7dc2b.tar.gz talos-op-linux-3b621ee5df437d3f332a635ab6421aaa61a7dc2b.zip | |
Merge branch 'master'
Diffstat (limited to 'arch/arm/mach-ixp2000/uengine.c')
| -rw-r--r-- | arch/arm/mach-ixp2000/uengine.c | 11 |
1 files changed, 5 insertions, 6 deletions
diff --git a/arch/arm/mach-ixp2000/uengine.c b/arch/arm/mach-ixp2000/uengine.c index 43e234349d4a..ec4e007a22ef 100644 --- a/arch/arm/mach-ixp2000/uengine.c +++ b/arch/arm/mach-ixp2000/uengine.c @@ -91,8 +91,8 @@ EXPORT_SYMBOL(ixp2000_uengine_csr_write); void ixp2000_uengine_reset(u32 uengine_mask) { - ixp2000_reg_write(IXP2000_RESET1, uengine_mask & ixp2000_uengine_mask); - ixp2000_reg_write(IXP2000_RESET1, 0); + ixp2000_reg_wrb(IXP2000_RESET1, uengine_mask & ixp2000_uengine_mask); + ixp2000_reg_wrb(IXP2000_RESET1, 0); } EXPORT_SYMBOL(ixp2000_uengine_reset); @@ -452,21 +452,20 @@ static int __init ixp2000_uengine_init(void) /* * Reset microengines. */ - ixp2000_reg_write(IXP2000_RESET1, ixp2000_uengine_mask); - ixp2000_reg_write(IXP2000_RESET1, 0); + ixp2000_uengine_reset(ixp2000_uengine_mask); /* * Synchronise timestamp counters across all microengines. */ value = ixp2000_reg_read(IXP2000_MISC_CONTROL); - ixp2000_reg_write(IXP2000_MISC_CONTROL, value & ~0x80); + ixp2000_reg_wrb(IXP2000_MISC_CONTROL, value & ~0x80); for (uengine = 0; uengine < 32; uengine++) { if (ixp2000_uengine_mask & (1 << uengine)) { ixp2000_uengine_csr_write(uengine, TIMESTAMP_LOW, 0); ixp2000_uengine_csr_write(uengine, TIMESTAMP_HIGH, 0); } } - ixp2000_reg_write(IXP2000_MISC_CONTROL, value | 0x80); + ixp2000_reg_wrb(IXP2000_MISC_CONTROL, value | 0x80); return 0; } |
