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authorLinus Torvalds <torvalds@linux-foundation.org>2008-12-30 17:36:49 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2008-12-30 17:36:49 -0800
commit14a3c4ab0e58d143c7928c9eb2f2610205e13bf2 (patch)
tree885992999d7a1a2fd3586efcf32ebcbcbc3a72aa /arch/arm/mach-ep93xx/clock.c
parent1af237a099a3b8ff56aa384f605c6a68af7bf288 (diff)
parent47992cbdaef2f18a47871b2ed01ad27f568c8b73 (diff)
downloadtalos-op-linux-14a3c4ab0e58d143c7928c9eb2f2610205e13bf2.tar.gz
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Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (407 commits) [ARM] pxafb: add support for overlay1 and overlay2 as framebuffer devices [ARM] pxafb: cleanup of the timing checking code [ARM] pxafb: cleanup of the color format manipulation code [ARM] pxafb: add palette format support for LCCR4_PAL_FOR_3 [ARM] pxafb: add support for FBIOPAN_DISPLAY by dma braching [ARM] pxafb: allow pxafb_set_par() to start from arbitrary yoffset [ARM] pxafb: allow video memory size to be configurable [ARM] pxa: add document on the MFP design and how to use it [ARM] sa1100_wdt: don't assume CLOCK_TICK_RATE to be a constant [ARM] rtc-sa1100: don't assume CLOCK_TICK_RATE to be a constant [ARM] pxa/tavorevb: update board support (smartpanel LCD + keypad) [ARM] pxa: Update eseries defconfig [ARM] 5352/1: add w90p910-plat config file [ARM] s3c: S3C options should depend on PLAT_S3C [ARM] mv78xx0: implement GPIO and GPIO interrupt support [ARM] Kirkwood: implement GPIO and GPIO interrupt support [ARM] Orion: share GPIO IRQ handling code [ARM] Orion: share GPIO handling code [ARM] s3c: define __io using the typesafe version [ARM] S3C64XX: Ensure CPU_V6 is selected ...
Diffstat (limited to 'arch/arm/mach-ep93xx/clock.c')
-rw-r--r--arch/arm/mach-ep93xx/clock.c68
1 files changed, 23 insertions, 45 deletions
diff --git a/arch/arm/mach-ep93xx/clock.c b/arch/arm/mach-ep93xx/clock.c
index 8c9f2491dccc..96049283a10a 100644
--- a/arch/arm/mach-ep93xx/clock.c
+++ b/arch/arm/mach-ep93xx/clock.c
@@ -16,11 +16,12 @@
#include <linux/module.h>
#include <linux/string.h>
#include <linux/io.h>
+
+#include <asm/clkdev.h>
#include <asm/div64.h>
#include <mach/hardware.h>
struct clk {
- char *name;
unsigned long rate;
int users;
u32 enable_reg;
@@ -28,53 +29,33 @@ struct clk {
};
static struct clk clk_uart = {
- .name = "UARTCLK",
.rate = 14745600,
};
-static struct clk clk_pll1 = {
- .name = "pll1",
-};
-static struct clk clk_f = {
- .name = "fclk",
-};
-static struct clk clk_h = {
- .name = "hclk",
-};
-static struct clk clk_p = {
- .name = "pclk",
-};
-static struct clk clk_pll2 = {
- .name = "pll2",
-};
+static struct clk clk_pll1;
+static struct clk clk_f;
+static struct clk clk_h;
+static struct clk clk_p;
+static struct clk clk_pll2;
static struct clk clk_usb_host = {
- .name = "usb_host",
.enable_reg = EP93XX_SYSCON_CLOCK_CONTROL,
.enable_mask = EP93XX_SYSCON_CLOCK_USH_EN,
};
-
-static struct clk *clocks[] = {
- &clk_uart,
- &clk_pll1,
- &clk_f,
- &clk_h,
- &clk_p,
- &clk_pll2,
- &clk_usb_host,
+#define INIT_CK(dev,con,ck) \
+ { .dev_id = dev, .con_id = con, .clk = ck }
+
+static struct clk_lookup clocks[] = {
+ INIT_CK("apb:uart1", NULL, &clk_uart),
+ INIT_CK("apb:uart2", NULL, &clk_uart),
+ INIT_CK("apb:uart3", NULL, &clk_uart),
+ INIT_CK(NULL, "pll1", &clk_pll1),
+ INIT_CK(NULL, "fclk", &clk_f),
+ INIT_CK(NULL, "hclk", &clk_h),
+ INIT_CK(NULL, "pclk", &clk_p),
+ INIT_CK(NULL, "pll2", &clk_pll2),
+ INIT_CK(NULL, "usb_host", &clk_usb_host),
};
-struct clk *clk_get(struct device *dev, const char *id)
-{
- int i;
-
- for (i = 0; i < ARRAY_SIZE(clocks); i++) {
- if (!strcmp(clocks[i]->name, id))
- return clocks[i];
- }
-
- return ERR_PTR(-ENOENT);
-}
-EXPORT_SYMBOL(clk_get);
int clk_enable(struct clk *clk)
{
@@ -106,12 +87,6 @@ unsigned long clk_get_rate(struct clk *clk)
}
EXPORT_SYMBOL(clk_get_rate);
-void clk_put(struct clk *clk)
-{
-}
-EXPORT_SYMBOL(clk_put);
-
-
static char fclk_divisors[] = { 1, 2, 4, 8, 16, 1, 1, 1 };
static char hclk_divisors[] = { 1, 2, 4, 5, 6, 8, 16, 32 };
@@ -138,6 +113,7 @@ static unsigned long calc_pll_rate(u32 config_word)
static int __init ep93xx_clock_init(void)
{
u32 value;
+ int i;
value = __raw_readl(EP93XX_SYSCON_CLOCK_SET1);
if (!(value & 0x00800000)) { /* PLL1 bypassed? */
@@ -165,6 +141,8 @@ static int __init ep93xx_clock_init(void)
clk_f.rate / 1000000, clk_h.rate / 1000000,
clk_p.rate / 1000000);
+ for (i = 0; i < ARRAY_SIZE(clocks); i++)
+ clkdev_add(&clocks[i]);
return 0;
}
arch_initcall(ep93xx_clock_init);
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